US 8,542,691 B2Granted

Classes of service for network on chips

AssigneeOracle International Corporation

InventorsHans Eberle, Wladyslaw Olesinski

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Abstract

A method includes a local switch receiving a first set of upstream packets and a first set of local packets, each assigned a first class of service. The local switch inserts, according to a first insertion rate, a local packet between subsets of the first set of upstream packets to obtain an ordered set of first class packets. The local switch also receives a second set of upstream packets and a second set of local packets, each assigned a second class. The local switch inserts, according to a second insertion rate, a local packet between subsets of the second set of upstream packets to obtain an ordered set of second class packets. The method includes for each timeslot, selecting a class, and forwarding a packet from the selected class of service to a downstream switch. The switches are interconnected in a daisy chain topology on a single chip.

Claims20

Dependent claims

A method for transmitting packets, comprising:

receiving, by a local switch of a plurality of switches each located on a single chip, a first plurality of upstream packets, each assigned a first class of service, from an upstream switch of the plurality of switches, wherein the plurality of switches are interconnected in a daisy chain topology;
receiving, by the local switch, a first plurality of local packets, each assigned the first class of service, from a local device located on the chip;
inserting, by the local switch according to a first insertion rate, at least one of the first plurality of local packets between a plurality of subsets of the first plurality of upstream packets to obtain a first ordered plurality of first class packets;
receiving, by the local switch, a second plurality of upstream packets, each assigned a second class of service, from the upstream switch;
receiving, by the local switch, a second plurality of local packets, each assigned the second class of service, from the local device;
inserting, by the local switch according to a second insertion rate, at least one of the second plurality of local packets between plurality of subsets of the second plurality of upstream packets to obtain an ordered plurality of second class packets;
and
for each timeslot of a plurality of timeslots:
selecting a selected class of service from a set comprising the first class of service and the second class of service;
and
forwarding, during the timeslot, a packet from the selected class of service to a downstream switch of the plurality of switches, wherein the packet from the selected class of service is obtained from a set comprising the first ordered plurality of first class packets and the ordered plurality of second class packets.

8 more elements

A chip comprising a plurality of switches, the plurality of switches comprising:

an upstream switch;
a downstream switch;
and
a local switch, operatively connected to a local device and interposed between the upstream switch and the downstream switch, wherein the local switch comprises:
a first class upper packet queue configured to store a first plurality of upstream packets, each assigned a first class of service, and received from the upstream switch;
a first class local packet queue configured to store a first plurality of local packets, each assigned the first class of service, and received from the local device;
a second class upper packet queue configured to store a second plurality of upstream packets, each assigned a second class of service, and received from the upstream switch;
a second class local packet queue configured to store a second plurality of local packets, each assigned the second class of service, and received from the local device;
a packet scheduling engine configured to:
insert, according to a first insertion rate, at least one of the first plurality of local packets between a plurality of subsets of the first plurality of upstream packets to obtain an ordered plurality of first class packets;
and
insert, according to a second insertion rate, at least one of the second plurality of local packets between a plurality of subsets of the second plurality of upstream packets to obtain an ordered plurality of second class packets;
a class scheduling engine configured to, for each timeslot of a plurality of timeslots:
select a selected class of service from a set comprising the first class of service and the second class of service;
and
forward, during the timeslot, a packet from the selected class of service to the downstream switch, wherein the packet is obtained from a set comprising the ordered plurality of first class packets and the ordered plurality of second class packets,
wherein the plurality of switches are interconnected in a daisy chain topology.

14 more elements

A chip comprising a plurality of switches, the plurality of switches comprising:

an upstream switch operatively connected to an upstream device;
a downstream switch operatively connected to a downstream device;
and
a local switch, operatively connected to a local device and interposed between the upstream switch and the downstream switch, wherein the local switch comprises:
an upper packet queue configured to store a plurality of upstream packets, wherein the plurality of upstream packets comprises a plurality of first class upstream packets assigned a first class of service, and a plurality of second class upstream packets assigned a second class of service, and received from the upstream switch;
a first class local packet queue configured to store a first plurality of local packets, each assigned the first class of service, and received from the local device;
a second class local packet queue configured to store a second plurality of local packets, each assigned the second class of service, and received from the local device;
a packet scheduling engine configured to:
insert, according to a first insertion rate, at least one of the first plurality of local packets between a first plurality of subsets of the plurality of upstream packets to obtain an ordered plurality of first class packets;
and
insert, according to a second insertion rate, at least one of the second plurality of local packets between a second plurality of subsets of the plurality of upstream packets to obtain an ordered plurality of second class packets;
a class scheduling engine configured to, for each of a plurality of timeslots:
select a selected class of service from a set comprising the first class of service and the second class of service;
and
forward, during the timeslot, a packet from the selected class of service to the downstream switch, wherein the packet is obtained from a set comprising the ordered plurality of first class packets and the ordered plurality of second class packets,
wherein the plurality of switches are interconnected in a daisy chain topology.

13 more elements

Dependencies are inferred from the claim text.

Facts

Application: 13/016,924Filed 28 Jan 2011 · continuation in part
Priority: 30 Jun 2009
Published: US 2011/0134933 A19 Jun 2011
Granted: 24 Sep 2013
Term ends: Not estimatedThe source records don’t support an estimate.

Classification4 codes

H04L 49/102
Characterised by the switching fabric construction: using shared medium, e.g. bus or ring
H04L 47/24
Flow control; Congestion control: traffic characterised by specific attributes, e.g. priority or QoS
H04L 49/109
Characterised by the switching fabric construction: integrated on microchip, e.g. switch-on-chip
H04L
Digital communication

Family

Application12/495,498Parent of this continuation-in-part · filed 30 Jun 2009
Application12/982,585Parent of this continuation-in-part · filed 30 Dec 2010
US 2011/0134933 A1Pre-grant publication · published 9 Jun 2011
US 8,189,578 B2Parent of this continuation-in-part
US 8,385,358 B2Parent of this continuation-in-part
US 2010/0329250 A1Published application
US 2012/0170459 A1Published application
US 8,542,691 B2This patent

From the US filing history. Foreign family members aren’t listed.

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