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AssigneeSanDisk Corporation
InventorsYan Li, Seungpil Lee, Siu Lung Chan
Estimating the term…
A non-volatile memory device capable of reading and writing a large number of memory cells with multiple read/write circuits in parallel has features to reduce power consumption during read, and program/verify operations. A read or program verify operation includes one or more sensing cycles relative to one or more demarcation threshold voltages to determine a memory state. In one aspect, selective memory cells among the group being sensed in parallel have their conduction currents turned off when they are determined to be in a state not relevant to the current sensing cycle. In another aspect, a power-consuming period is minimized by preemptively starting any operations that would prolong the period. In a program/verify operation cells not to be programmed have their bit lines charged up in the program phase. Power is saved when a set of these bit lines avoids re-charging at every passing of a program phase.
In an array of nonvolatile memory cells, wherein each memory cell is programmable relative to one of a series of demarcation threshold voltages that corresponds to one of multiple memory states, a method of sensing in parallel via associated bit lines a group of the memory cells, comprising:
Dependencies are inferred from the claim text.