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US 8,542,516 B2Granted
Semiconductor system
AssigneeElpida Memory, Inc.
InventorHideyuki Yoko
Life of this patent
Estimating the term…
Abstract
A device that includes a first semiconductor chip and a second semiconductor chip. The first semiconductor chip includes a first terminal, a second terminal, a first circuit electrically coupled to the second terminal, a second circuit electrically coupled to the first terminal and the first circuit, and a third circuit electrically coupled to the second circuit. The second semiconductor chip includes a third terminal, a fourth terminal, a fourth circuit electrically coupled to the fourth terminal, a fifth circuit electrically coupled to the third terminal and the fourth circuit, and a sixth circuit electrically coupled to the fifth circuit.
Claims19
A device comprising:
- a first semiconductor chip that comprises:
- a first terminal supplied with a first voltage;
- a second terminal supplied with first control information;
- a first circuit electrically coupled to the second terminal, the first circuit being configured to output a first control signal in response to the first control information;
- a second circuit electrically coupled to the first terminal and the first circuit, the second circuit being configured to operate on the first voltage and generate a second voltage in response to the first control signal;
- and a third circuit electrically coupled to the second circuit, the third circuit being configured to operate on the second voltage;
- and a second semiconductor chip that comprises:
- a third terminal supplied with the first voltage;
- a fourth terminal supplied with second control information;
- a fourth circuit electrically coupled to the fourth terminal, the fourth circuit being configured to output a second control signal in response to the second control information;
- a fifth circuit electrically coupled to the third terminal and the fourth circuit, the fifth circuit being configured to operate on the first voltage and generate a third voltage in response to the second control information;
- and a sixth circuit electrically coupled to the fifth circuit, the sixth circuit being configured to operate on the third voltage;
- the first semiconductor chip being stacked over the second semiconductor chip;
- wherein the second semiconductor chip further comprise fifth terminal, and the first semiconductor chip is stacked over the second semiconductor chip such that the first and third terminals are electrically coupled to each other, the second and fifth terminals are electrically coupled to each other;
- wherein the second semiconductor chip further comprises first, second and third penetration electrodes each penetrating a semiconductor substrate of the second semiconductor chip, the first, second and third penetration electrodes being electrically coupled to the third, fourth and fifth terminals, respectively.
12 more elements
A device comprising:
- a first semiconductor chip that comprises:
- a first terminal supplied with a first voltage;
- a second terminal supplied with first control information;
- a first circuit electrically coupled to the second terminal, the first circuit being configured to output a first control signal in response to the first control information;
- a second circuit electrically coupled to the first terminal and the first circuit, the second circuit being configured to operate on the first voltage and generate a second voltage in response to the first control signal;
- and a third circuit electrically coupled to the second circuit, the third circuit being configured to operate on the second voltage;
- and a second semiconductor chip that comprises:
- a third terminal supplied with the first voltage;
- a fourth terminal supplied with second control information;
- a fourth circuit electrically coupled to the fourth terminal, the fourth circuit being configured to output a second control signal in response to the second control information;
- a fifth circuit electrically coupled to the third terminal and the fourth circuit, the fifth circuit being configured to operate on the first voltage and generate a third voltage in response to the second control information;
- and a sixth circuit electrically coupled to the fifth circuit, the sixth circuit being configured to operate on the third voltage;
- the first semiconductor chip being stacked over the second semiconductor chip;
- wherein the second voltage is greater than the first voltage;
- wherein the third voltage is greater than the first voltage;
- wherein the second and third voltage are substantially equal to each other.
13 more elements
A device comprising:
- a first semiconductor chip that comprises:
- a first terminal supplied with a first voltage;
- a second terminal supplied with first control information;
- a first circuit electrically coupled to the second terminal, the first circuit being configured to output a first control signal in response to the first control information;
- a second circuit electrically coupled to the first terminal and the first circuit, the second circuit being configured to operate on the first voltage and generate a second voltage in response to the first control signal;
- and a third circuit electrically coupled to the second circuit, the third circuit being configured to operate on the second voltage;
- and a second semiconductor chip that comprises:
- a third terminal supplied with the first voltage;
- a fourth terminal supplied with second control information;
- a fourth circuit electrically coupled to the fourth terminal, the fourth circuit being configured to output a second control signal in response to the second control information;
- a fifth circuit electrically coupled to the third terminal and the fourth circuit, the fifth circuit being configured to operate on the first voltage and generate a third voltage in response to the second control information;
- and a sixth circuit electrically coupled to the fifth circuit, the sixth circuit being configured to operate on the third voltage;
- the first semiconductor chip being stacked over the second semiconductor chip;
- wherein the second voltage is smaller than the first voltage;
- wherein the third voltage is smaller than the first voltage;
- wherein the second and third voltage are substantially equal to each other.
13 more elements
A device comprising:
- a first semiconductor chip that comprises:
- a first terminal supplied with a first voltage;
- a second terminal supplied with first control information;
- a first circuit electrically coupled to the second terminal, the first circuit being configured to output a first control signal in response to the first control information;
- a second circuit electrically coupled to the first terminal and the first circuit, the second circuit being configured to operate on the first voltage and generate a second voltage in response to the first control signal;
- and a third circuit electrically coupled to the second circuit, the third circuit being configured to operate on the second voltage;
- and a second semiconductor chip that comprises:
- a third terminal supplied with the first voltage;
- a fourth terminal supplied with second control information;
- a fourth circuit electrically coupled to the fourth terminal, the fourth circuit being configured to output a second control signal in response to the second control information;
- a fifth circuit electrically coupled to the third terminal and the fourth circuit, the fifth circuit being configured to operate on the first voltage and generate a third voltage in response to the second control information;
- and a sixth circuit electrically coupled to the fifth circuit, the sixth circuit being configured to operate on the third voltage;
- the first semiconductor chip being stacked over the second semiconductor chip;
- wherein the first semiconductor chip further comprises a tenth circuit configured to operate on the first voltage to generate a fifth voltage, the first circuit being coupled to the tenth circuit and operating on the fifth voltage.
11 more elements
A device comprising:
- a first semiconductor chip that comprises:
- a first terminal supplied with a first voltage;
- a second terminal supplied with first control information;
- a first circuit electrically coupled to the second terminal, the first circuit being configured to output a first control signal in response to the first control information;
- a second circuit electrically coupled to the first terminal and the first circuit, the second circuit being configured to operate on the first voltage and generate a second voltage in response to the first control signal;
- and a third circuit electrically coupled to the second circuit, the third circuit being configured to operate on the second voltage;
- and a second semiconductor chip that comprises:
- a third terminal supplied with the first voltage;
- a fourth terminal supplied with second control information;
- a fourth circuit electrically coupled to the fourth terminal, the fourth circuit being configured to output a second control signal in response to the second control information;
- a fifth circuit electrically coupled to the third terminal and the fourth circuit, the fifth circuit being configured to operate on the first voltage and generate a third voltage in response to the second control information;
- and a sixth circuit electrically coupled to the fifth circuit, the sixth circuit being configured to operate on the third voltage;
- the first semiconductor chip being stacked over the second semiconductor chip;
- wherein the second circuit is further configured to generate a seventh voltage, the third circuit is configured to operate on both the second and seventh voltages.
11 more elements
A device comprising:
- a first semiconductor chip that comprises:
- first and second terminals supplied with first and second voltages, respectively, the first voltage being greater than the second voltage;
- a third terminal supplied with first control information;
- a first circuit coupled to the third terminal, the first circuit being configured to output a first control signal in response to the first control information;
- a second circuit coupled to the first and second terminals and the first circuit, the second circuit being configured to generate a third voltage based on the first and second voltages in response to the first control signal, the third voltage being different from each of the first and second voltages;
- and
- a third circuit coupled to the second circuit, the third circuit being configured to operate on the third voltage;
- and
- a second semiconductor chip stacked with the first semiconductor chip, the second semiconductor chip that comprises:
- fourth and fifth terminals supplied with the first and second voltages, respectively;
- a sixth terminal supplied with second control information;
- a fourth circuit coupled to the sixth terminal, the fourth circuit being configured to output a second control signal in response to the second control information;
- a fifth circuit coupled to the fourth and fifth terminals and the fourth circuit, the fifth circuit being configured to generate a fourth voltage based on the first and second voltages in response to the second control signal, the fourth voltage being different from each of the first and second voltages;
- and
- a sixth circuit coupled to the fifth circuit, the sixth circuit being configured to operate on the fourth voltage.
12 more elements
Dependencies are inferred from the claim text.