US 8,542,224 B2Granted

Display clip system and timing clip control method thereof

AssigneeChunghwa Picture Tubes, Ltd.

InventorsChung-Chih Hsiao, Chiao-Lin Huang

Life of this patent

Estimating the term…

Loading patent…

Abstract

A display clip system and a timing clip control method thereof are provided. The clip system is connected to a gate driver circuit, and includes a timing controller and a clip module. According to a system input signal and its frame rates, the timing controller generates an enable signal, a clip trigger signal, and a base working signal. The clip module adjusts the base working signal by using the enable signal and the clip trigger signal. Then, the base working signal carries a first clip voltage to output to the gate driver circuit. When the frame rate changes, the timing controller adjusts trigger points and trigger time lengths of the enable signal and the clip trigger signal, and the clip module adjusts the base working signal. Then, the base working signal carries a second clip voltage equal to the first clip voltage to output to the gate driver circuit.

Claims8

Dependent claims

A clip system of a display, connected to a gate driver circuit of the display, comprising:

a timing controller, for generating a first output enable signal, a first clip trigger signal, and a base working signal whose frame rates are the same as a frame rate of a system input signal according to the system input signal, and outputting the first output enable signal, the first clip trigger signal, and the base working signal, wherein the timing controller adjusts the first output enable signal and the first clip trigger signal to a second output enable signal and a second clip trigger signal for outputting according to the change of the frame rate when the frame rate of the system input signal changed;
and
a clip module, for receiving the base working signal, the first output enable signal, and the first clip trigger signal, adjusting the base working signal by using the first output enable signal and the first clip trigger signal to form a first clip voltage and output the first clip voltage to the gate driver circuit, receiving the second output enable signal and the second clip trigger signal, and adjusting the base working signal by using the second output enable signal and the second clip trigger signal to form a second clip voltage equal to the first clip voltage and output the second clip voltage to the gate driver circuit,
wherein a trigger time length of the first clip trigger signal equals a trigger time length of the second clip trigger signal, a trigger time length of the first output enable signal equals a trigger time length of the second output enable signal, a time interval between a trigger point of the first clip trigger signal and a trigger point of the first output enable signal equals a time interval between a trigger point of the second clip trigger signal and a trigger point of the second output enable signal, so that a charging time length and charging charges of a liquid crystal element connected to the gate driver circuit remain the same.

1 more element

A signal timing clip control method, applicable in a timing controller and a clip module of a display, wherein the clip module is connected to a gate driver circuit, the method comprising:

generating, by the timing controller, according to a system input signal, a first output enable signal, a first clip trigger signal, and a base working signal, whose frame rates are the same as a frame rate of the system input signal;
adjusting, by the clip module, the base working signal according to the first output enable signal and the first clip trigger signal to form a first clip voltage, and outputting the base working signal carrying the first clip voltage to the gate driver circuit;
adjusting, by the timing controller, the first output enable signal and the first clip trigger signal to a second output enable signal and a second clip trigger signal according to change of the frame rate when the timing controller judges that the frame rate of the system input signal is changed, wherein a trigger time length of the first clip trigger signal equals a trigger time length of the second clip trigger signal, a trigger time length of the first output enable signal equals a trigger time length of the second output enable signal, a time interval between a trigger point of the first clip trigger signal and a trigger point of the first output enable signal equals a time interval between a trigger point of the second clip trigger signal and a trigger point of the second output enable signal;
and
adjusting, by the clip module, the base working signal by using the second output enable signal and the second clip trigger signal to form a second clip voltage equal to the first clip voltage;
and outputting the base working signal carrying the second clip voltage to the gate driver circuit.

3 more elements

Dependencies are inferred from the claim text.

Facts

Application: 13/149,537Filed 31 May 2011
Priority: TW 99137210 A29 Oct 2010
Published: US 2012/0105405 A13 May 2012
Granted: 24 Sep 2013
Term ends: Not estimatedThe source records don’t support an estimate.

Classification10 codes

G06F 1/3265
Power saving in peripheral device: power saving in display device
G09G 3/3648
Control of matrices with row and column drivers: using an active matrix
G09G 3/3674
Control of matrices with row and column drivers: details of drivers for scan electrodes
G09G 2310/08
Command of the display device: details of timing specific for flat panels, other than clock recovery

Family

US 2012/0105405 A1Pre-grant publication · published 3 May 2012
US 8,542,224 B2This patent

From the US filing history. Foreign family members aren’t listed.

Timeline

Citations

Open elsewhere

Building an agent or pulling many patents? Use the API or MCP server instead of scraping pages. Get an API key