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US 8,542,176 B2Granted
Timing controller, error detection method of the timing controller, and display device having the timing controller
AssigneeSamsung Display Co., Ltd.
InventorJae-Hyoung Park
Life of this patent
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Abstract
A timing controller includes a control unit, an error signal generating unit, and an operation detecting unit. The control unit transfers a plurality of input data and outputs a plurality of completion signals according to transfer states of the respective data. The error signal generating unit generates a plurality of error signals with different waveforms, and the operation detecting unit selectively outputs one of the plurality of error signals in response to the plurality of completion signals.
Claims19
A timing controller, comprising:
- a control unit configured to transfer a plurality of input data and output a plurality of completion signals according to transfer states of the respective input data;
- an error signal generating unit configured to generate a plurality of error signals with different waveforms;
- and an operation detecting unit configured to selectively output one of the plurality of error signals in response to the plurality of completion signals.
An error detection method of a timing controller, comprising:
- generating a plurality of error signals with different waveforms;
- transferring a plurality of input data, and outputting a plurality of completion signals according to transfer states of the respective input data;
- and
- selectively outputting one of the plurality of error signals in response to the plurality of completion signals.
1 more element
A display device, comprising:
- a display panel configured to display an image;
- a timing controller configured to receive a plurality of input data, to output error signals according to transfer states of the input data, to process an external input image signal, and to generate a plurality of control signals, wherein the timing controller is configured to output one of the error signals in response to a plurality of completion signals;
- a driving voltage generator configured to generate a plurality of driving voltages according to the control signals generated by the timing controller;
- a gate driver configured to apply the driving voltages generated from the driving voltage generator to gate lines of the display panel;
- and
- a data driver configured to generate data signals by using the driving voltages generated from the driving voltage generator, and to apply the data signals to data lines of the display panel,
- wherein the plurality of completion signals are generated according to the transfer states of the input data.
4 more elements
Dependencies are inferred from the claim text.