Power switch acceleration scheme for fast wakeup

An integrated circuit comprising:

• a first delay chain having a first plurality of delay elements;
• a plurality of power switches coupled between a supply voltage node and a virtual voltage node, wherein the plurality of power switches are configured to provide a supply voltage to the virtual voltage node responsive to receiving an enable signal, wherein each of the plurality of power switches is coupled to an output of a corresponding one of the first plurality of delay elements, wherein the plurality of power switches are arranged to activate sequentially responsive to the enable signal propagating through the first delay chain;
• and
• a power control unit configured to assert the enable signal, wherein the first delay chain is coupled to receive the enable signal from the power control unit;
• wherein, subsequent to the power control unit asserting the enable signal, the first plurality of delay elements is configured to reduce a respective amount of delay provided by the first delay chain responsive to detecting an increase of a voltage on the virtual voltage node.

A method comprising:

• providing an enable signal to a first delay chain comprising a first plurality of serially-coupled delay elements;
• propagating the enable signal through the first delay chain at a first rate;
• sequentially activating each of a first plurality of power transistors responsive to propagating the enable signal through the delay chain at the first rate, wherein each of the first plurality of power transistors and of a second plurality of power transistors is coupled between a global voltage node and a local voltage node of a power gated functional unit of an integrated circuit;
• propagating the enable signal through the first delay chain at a second rate greater than the first rate responsive to determining that a voltage on the local voltage node is greater than a threshold voltage;
• and
• sequentially activating each of the second plurality of transistors responsive to propagating the enable signal at the second rate.

An integrated circuit comprising:

• a power gated functional unit having a local voltage supply node and logic circuitry coupled to the local voltage supply node;
• a plurality of transistors coupled between the local voltage supply node and a global voltage supply node, wherein the plurality of transistors are configured to, when active, electrically couple the local voltage supply node to the global voltage supply node;
• a first plurality of serially-coupled delay elements each having a respective output coupled to a gate terminal of a corresponding one of the plurality of transistors, wherein the first plurality of serially-coupled delay elements is configured to receive and propagate an enable signal, and wherein each of the plurality of transistors is configured to activate responsive to receiving the enable signal on its respective gate terminal;
• wherein the first plurality of serially coupled delay elements is configured propagate the enable signal at a first rate responsive to a voltage on the local voltage supply node being less than a threshold value, and further configured to propagate the enable signal at a second rate greater than the first rate detecting the voltage on the local voltage supply node is greater than or equal to the threshold value.