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US 8,542,036 B2Granted
Transmitter having source follower voltage regulator
AssigneeSamsung Electronics Co., Ltd.
InventorsSeungjun Bae, Kwangil Park, Youngsoo Sohn
Life of this patent
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Abstract
A transmitter suitable for signal driving of a semiconductor device includes a driving power voltage generator and an output driver. The driving power voltage generator includes an NMOS transistor having a drain connected with a first voltage supply terminal, a gate connected to receive a second voltage lower than a voltage of the first voltage supply terminal, and a source outputting an output driving voltage and configured to perform source follower voltage regulating.
Claims15
A transmitter comprising:
- a driving power voltage generator including an NMOS transistor having a drain connected with a first voltage supply terminal, a gate configured to receive a second voltage lower than a voltage of the first voltage supply terminal, and a source configured to output an output driving voltage, the driving power voltage generator configured to perform source follower voltage regulating;
- an output driver that uses the output driving voltage as a driving power and is configured to transfer data input at an input terminal of the output driver to an output terminal of the output driver;
- and
- an operation mode controller connected with the driving power voltage generator,
- wherein the operation mode controller is configured to control the driving power voltage generator to operate in a closed loop during a calibration mode and in an open loop during an operation mode other than the calibration mode.
2 more elements
A voltage regulator comprising:
- a driving power voltage generator comprising at least one NMOS transistor, whose drain is connected to a power supply voltage, whose gate is configured to receive a gate voltage, and whose source is configured to output an output driving voltage, and
- an operation mode controller connected to the driving power voltage generator and configured to control the driving power voltage generator to operate in a closed loop mode during a calibration operation, and to operate in an open loop mode during an operation other than the calibration operation,
- wherein in the closed loop mode a first code or a second code is generated by calibrating the output driving voltage during the calibration operation to provide a gate voltage to the gate of the at least one NMOS transistor in response to the first code or to control the driving strength of the at least one NMOS transistor in response to the second code, and
- wherein in the open loop mode the operation mode controller does not receive feedback from the driving power voltage generator.
1 more element
Dependencies are inferred from the claim text.