Test apparatus to test a data signal and a clock signal output from a device under test

A test apparatus configured to test a data signal and a clock signal output from a device under test using a source synchronous method, the test apparatus comprising:

• a first timing comparator configured to latch the data signal at a timing that corresponds to each edge of a first strobe signal;
• a first delay element having its input terminal receiving the first strobe signal, and configured to delay the first strobe signal so as to output a first delayed strobe signal via its output terminal;
• a first clock recovery unit having its first input terminal connected to the output terminal of the first delay element and its second input terminal receiving the clock signal, and configured to make a comparison between the phase of the first delayed strobe signal and the phase of the clock signal, to output a first reference strobe signal via its output terminal, and to adjust the phase of the first reference strobe signal such that the phases thus compared match each other;
• a third delay element having its input terminal connected to the output terminal of the first clock recovery unit and its output terminal connected to a clock terminal of the first timing comparator, and configured to delay the first reference strobe signal, and to output the signal thus delayed as the first strobe signal via its output terminal;
• a second timing comparator configured to latch the clock signal at a timing that corresponds to each edge of the second strobe signal;
• a second delay element having its input terminal receiving the second strobe signal, and configured to delay the second strobe signal so as to output a second delayed strobe signal via its output terminal;
• a second clock recovery unit having its first input terminal connected to the output terminal of the second delay element and its second input terminal receiving the clock signal, and configured to make a comparison between the phase of the second delayed strobe signal and the phase of the clock signal, to output a second reference strobe signal via its output terminal, and to adjust the phase of the second reference strobe signal such that the phases thus compared match each other;
• and
• a fourth delay element having its input terminal connected to the output terminal of the second clock recovery unit and its output terminal connected to a clock terminal of the second timing comparator, and configured to delay the second reference strobe signal, and to output the signal thus delayed as the second strobe signal via its output terminal.