US 8,541,883 B2 · Semiconductor device having shielded conductive vias

Abstract

The present invention relates to a semiconductor device having a shielding layer. The semiconductor device includes a substrate, an inner metal layer, a shielding layer, an insulation material, a metal layer, a passivation layer and a redistribution layer. The inner metal layer is disposed in a through hole of the substrate. The shielding layer surrounds the inner annular metal. The insulation material is disposed between the inner metal layer and the shielding layer. The metal layer is disposed on a surface of the substrate, contacts the shielding layer and does not contact the inner metal layer. The redistribution layer is disposed in an opening of the passivation layer so as to contact the inner metal layer.

Claims14

Dependent claims

A semiconductor device, comprising

a substrate composed of a semiconductor material;
a conductive via, the conductive via including
an inner conductive layer surrounding a central axis of a through hole in the substrate;
a metal shielding layer surrounding the inner conductive layer and disposed on a side wall of the through hole directly contacting the semiconductor material of the substrate;
and
an insulation material disposed between the inner conductive layer and the shielding layer;
wherein the inner conductive layer and the shielding layer are ring structures substantially coaxial to the central axis;
and
a first metal layer disposed on a first surface of the substrate, the first metal layer contacting the metal shielding layer.

6 more elements

Dependencies are inferred from the claim text.

Facts

Application

13/306,762Filed 29 Nov 2011

Published

US 2013/0134601 A130 May 2013

Granted

24 Sep 2013

Term ends

Not estimatedThe source records don’t support an estimate.

Classification25 codes

H10W 20/023
Of interconnections within wafers or substrates: the interconnections being through-semiconductor vias
H10W 20/0245
The interconnections being through-semiconductor vias: comprising use of blind vias during the manufacture
H10W 20/0265
The interconnections being through-semiconductor vias: characterised by the sidewall insulation
H10W 20/20
Interconnections in chips, wafers or substrates: interconnections within wafers or substrates, e.g. through-silicon vias [TSV]

Semiconductor device having shielded conductive vias

Life of this patent

Semiconductor device having shielded conductive vias

Life of this patent

Abstract

Claims14