Top electrode templating for DRAM capacitor

A semiconductor layer stack comprising:

• a first electrode layer formed above a substrate;
• a dielectric layer formed above the first electrode layer,
• wherein the dielectric layer has a rutile crystal structure;
• a metal oxide second electrode interface layer formed above the dielectric layer,
• wherein the metal oxide second electrode layer comprises molybdenum oxide having a rutile or distorted rutile crystal structure,
• wherein the metal oxide second electrode layer and the dielectric layer have reverse templating crystal structure compatibility such that the metal oxide second electrode layer exhibits a structural synergy by interfacing with the dielectric layer;
• and
• a second electrode bulk layer formed above the metal oxide second electrode interface layer.