Structure and method for semiconductor power devices

A semiconductor device, comprising:

• a semiconductor substrate of a first conductivity type;
• a dielectric layer disposed on the semiconductor substrate;
• a first semiconductor region disposed on the dielectric layer;
• an MOS transistor, including:
• a source region of the first conductivity type disposed in the first semiconductor region;
• a drain region of the first conductivity type disposed in the first semiconductor region, the drain region being configured to operate as an emitter of a bipolar transistor;
• a body region of a second conductivity type disposed between the drain region and the source region in the first semiconductor region;
• and
• a gate disposed on a surface portion of the body region, the surface portion of the body region including a channel region of the MOS transistor;
• a second semiconductor region of the first conductivity type disposed on and in direct contact with the semiconductor substrate, the second semiconductor region being configured to operate as a collector of the bipolar transistor;
• a third semiconductor region of the second conductivity type disposed on top of the second semiconductor region, the third semiconductor region being in contact with the drain region of the MOS transistor and configured to operate as a base of the bipolar transistor;
• and
• a resistive element coupled between the gate and the third semiconductor region.