US 8,541,833 B2 · Power transistor device vertical integration

Abstract

A semiconductor component includes a sequence of layers, the sequence of layers including a first insulator layer, a first semiconductor layer disposed on the first insulator layer, a second insulator layer disposed on the first semiconductor layer, and a second semiconductor layer disposed on the second insulator layer. The semiconductor component also includes a plurality of devices at least partly formed in the first semiconductor layer. A first one of the plurality of devices is a power transistor formed in a first region of the first semiconductor layer and a first region of the second semiconductor layer. The first region of the first and second semiconductor layers are in electrical contact with one another through a first opening in the second insulator layer.

Claims14

Dependent claims

A semiconductor component, comprising:

a sequence of layers including a first insulator layer, a first semiconductor layer disposed on the first insulator layer, a second insulator layer disposed on the first semiconductor layer, and a second semiconductor layer disposed on the second insulator layer;
and
a plurality of devices at least partly formed in the first semiconductor layer, a first one of the plurality of devices being a power transistor formed in a first region of the first semiconductor layer and a first region of the second semiconductor layer, the first region of the first and second semiconductor layers being in electrical contact with one another through a first opening in the second insulator layer.

A semiconductor component, comprising:

a sequence of layers including a first insulator layer, a first semiconductor layer disposed on the first insulator layer, a second insulator layer disposed on the first semiconductor layer, and a second semiconductor layer disposed on the second insulator layer;
a power transistor having a drain formed in a first region of the first semiconductor layer and a drift zone, body, source and gate formed in a first region of the second semiconductor layer, the drift zone being electrically connected to the drain through a first opening in the second insulator layer;
and
a diode having an anode and a cathode formed in a second region of the first semiconductor layer, the anode being electrically connected to the drain of the power transistor and the cathode being electrically connected to a second region of the second semiconductor layer through a second opening in the second insulator layer, the first and second regions of the second semiconductor layer being laterally insulated from one another.

1 more element

Dependencies are inferred from the claim text.

Facts

Application

13/082,679Filed 8 Apr 2011

Published

US 2012/0256250 A111 Oct 2012

Granted

24 Sep 2013

Term ends

Not estimatedThe source records don’t support an estimate.

Classification5 codes

H10D 84/016
The components including insulated gates, e.g. IGFETs: the components including vertical IGFETs
H10D 84/038
Using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology: using silicon technology, e.g. SiGe
H10D 87/00
Integrated devices comprising both bulk components and either soi or sos components
H10D 88/101
Three-dimensional [3D] integrated devices: comprising components on opposite major surfaces of semiconductor substrates

Power transistor device vertical integration

Life of this patent

Power transistor device vertical integration

Life of this patent

Abstract

Claims14