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US 8,541,687 B2Granted
Coreless layer buildup structure
AssigneeEndicott Interconnect Technologies, Inc.
InventorsVoya Markovich, Timothy Antesberger, Frank D. Egitto, William Wilson, Rabindra N. Das
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Abstract
A substrate for use in a PCB or PWB board having a coreless buildup layer and at least one metal and at least one dielectric layer. The coreless buildup dielectric layers can consist of at least partially cured thermoset resin and thermoplastic resin.
Claims18
A coreless substrate for use in a PC board comprising:
- a) an etched first metal layer having a first and a second surface;
- b) at least two coreless, partially-filled thermoset resin-coated CU-based buildup layers disposed respectively on said first and said second surfaces;
- c) a second and a third metal layer disposed on said at least two coreless buildup layers, respectively;
- and
- d) an electrical connection between said first and said second metal layers, and said first and said third metal layers, and said second and said third metal layers;
- whereby a high density, thin, coreless substrate is produced.
3 more elements
Dependencies are inferred from the claim text.