Semiconductor device and method of double photolithography process for forming patterns of the semiconductor device

A method of forming patterns, comprising:

• forming a first layer and a second layer;
• forming a first patterned mask on the second layer;
• forming a first spacer layer having a thickness equal to a selected target width on the first patterned mask and the second layer;
• blanket etching the first spacer layer to expose at least a portion of a top surface of the first patterned mask and form a plurality of first spacers on a sidewall of the first patterned mask;
• removing the first patterned mask;
• etching the second layer using the plurality of first spacers as an etch mask to form a second patterned mask;
• forming a second spacer layer to a thickness equal to the target width on the first layer and the second patterned mask;
• blanket etching the second spacer layer to form a plurality of second spacers on a sidewall of the second patterned mask and removing the second patterned mask;
• and
• etching the first layer using the plurality of second spacers as an etch mask to form lines and spaces with the target width,
• wherein the first patterned mask defines protrusions arranged at a first interval, the first interval being two target widths larger than the lines of the first layer formed in pad regions in which neighboring second spacers are combined together.

A method of forming patterns of a semiconductor device, comprising:

• forming a conductive layer and an insulating layer on a substrate and forming a first patterned mask on the insulating layer;
• forming a first spacer layer having a thickness equal to a target width on the first patterned mask and the insulating layer;
• etching the first spacer layer to expose at least a top surface of the first patterned mask and form a plurality of first spacers on a sidewall of the first patterned mask;
• removing the first patterned mask;
• etching the insulating layer using the first spacer as an etch mask to form a second patterned mask;
• forming a second spacer layer to a thickness equal to the target width on the conductive layer and the second patterned mask;
• etching the second spacer layer to form a plurality of second spacers on a sidewall of the second patterned mask and removing the second patterned mask;
• and
• etching the conductive layer using the plurality of second spacers as an etch mask to form conductive lines with the target width,
• wherein the first patterned mask defines protrusions arranged at a first interval, the first interval being two target widths larger than the conductive lines of the conductive layer formed in pad regions in which neighboring second spacers are combined together,
• wherein the second patterned mask includes pad regions filled with combined neighboring second spacers during the etching the second spacer layer to form a plurality of second spacers, and the filled pad regions are used as an etch mask for forming pads,
• wherein the forming a first patterned mask includes forming a first region extending in a first direction, and a second region extending from an end portion of the first region in a second direction and including first through third protrusions,
• the first and third protrusions are spaced a distance equal to four times the target width apart from the second protrusion disposed between the first and third protrusions, and
• the pad regions correspond to the first and third protrusions, a space between the first and second protrusions, and a space between the second and third protrusions.