Non-volatile memory device and method for fabricating the same

A method of fabricating a non-volatile memory device, comprising:

• providing a substrate defined as a cell region and a peripheral region;
• sequentially forming a tunnel insulation layer and a first polysilicon layer on the substrate;
• patterning the first polysilicon layer and the tunnel insulation layer on the cell region, the patterning comprising removing the first polysilicon layer and the tunnel insulation layer formed on the peripheral region;
• forming a dielectric layer to cover the patterned first polysilicon layer and the patterned tunnel insulation layer;
• forming a gate insulation layer on the substrate where the substrate is exposed;
• forming a second polysilicon layer to cover the dielectric layer;
• forming a peripheral gate electrode by patterning portions of the second polysilicon layer and the gate insulation layer formed on the peripheral region;
• forming a first floating gate and a second floating gate a fixed distance apart from each other, the forming of the first and second floating gates comprising:
• sequentially etching middle portions of the second polysilicon layer, the dielectric layer, the patterned first polysilicon layer, and the patterned tunnel insulation layer formed on the cell region;
• and
• separating the etched layers into two parts;
• forming a first selection gate and a second selection gate contacted with sidewalls of the separated two dielectric layers and isolated from the substrate by the gate insulation layer;
• and
• forming a plurality of first source/drain regions and a plurality of second source/drain regions in respective portions of the substrate defined as the cell region and the peripheral region that were exposed after the etching of the middle portions.