Method for forming vias in a substrate
AssigneeAdvanced Semiconductor Engineering, Inc.
InventorMeng-Jen Wang
Life of this patent
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Abstract
The present invention relates to a method for forming vias in a substrate, including the following steps: (a) providing a substrate having a first surface and a second surface; (b) forming a groove on the substrate; (c) filling the groove with a conductive metal; (d) removing part of the substrate which surrounds the conductive metal, wherein the conductive metal is maintained so as to form an accommodating space between the conductive metal and the substrate; (e) forming an insulating material in the accommodating space; and (f) removing part of the second surface of the substrate to expose the conductive metal and the insulating material. In this way, thicker insulating material can be formed in the accommodating space, and the thickness of the insulating material in the accommodating space is even.
Claims20
A method for forming vias in a substrate, comprising:
- (a) providing a substrate having a first surface and a second surface;
- (b) forming a groove on the substrate;
- (c) filling the groove with a conductive metal;
- (d) removing part of the substrate which surrounds the conductive metal, wherein the conductive metal is maintained so as to form an accommodating space between the conductive metal and the substrate;
- (e) forming an insulating material in the accommodating space;
- and
- (f) removing part of the second surface of the substrate to expose the conductive metal and the insulating material.
Dependencies are inferred from the claim text.