Patterning methods and masks
AssigneeInfineon Technologies AG
InventorYayi Wei
Life of this patent
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Abstract
Masks for patterning material layers of semiconductor devices, methods of patterning and methods of manufacturing semiconductor devices, and lithography systems are disclosed. A lithography mask includes a pattern of alternating lines and spaces, wherein the lines and spaces comprise different widths. When the lithography mask is used to pattern a material layer of a semiconductor device, the pattern of the material layer comprises alternating lines and spaces having substantially the same width.
Claims20
A method of manufacturing a semiconductor device, the method comprising:
- determining a layout for a material layer on a workpiece wherein the layout comprises a plurality of lines and spaces and wherein each line comprises a first width and each space comprises a second width;
- providing a lithography mask based on the layout for the material layer wherein the lithography mask comprises a plurality of lines and spaces wherein each line comprises a third width and wherein each space comprises a fourth width, wherein the third width and the fourth width are different;
- and
- forming the layout for the material layer into a photosensitive material atop the material layer using the lithography mask such that the first width and the second width of the plurality of lines and spaces are substantially equal.
A method of manufacturing a semiconductor device, the method comprising:
- determining a layout of a material layer on a workpiece having lines and spaces;
- providing a lithography mask based on the lines and spaces of the layout, wherein the lines and spaces of the lithography mask comprises different widths;
- exposing to light a photoresist layer through the lithography mask thereby forming the lines and spaces of the layout in the photoresist layer, the lines and spaces each comprising substantially the same width;
- and
- transferring the lines and spaces of the photoresist layer into the material layer.
A method of manufacturing a semiconductor device, the method comprising:
- determining a layout for a workpiece, wherein the layout comprises a first pattern of a plurality of alternating lines and spaces, wherein the lines of the first pattern comprise a first width, wherein the spaces of the first pattern comprise the first width;
- providing a lithography mask corresponding to the layout for the workpiece, the lithography mask comprising a second pattern of a plurality of alternating lines and spaces, wherein the lines of the second pattern comprise a second width, wherein the spaces of the second pattern comprise a third width, wherein the first width is different than the second width and the third width, and wherein the second width is different than the third width;
- and
- illuminating a photoresist disposed on the workpiece through the lithography mask thereby forming the lines of the first pattern with the first width and the spaces of the first pattern with the first width.
Dependencies are inferred from the claim text.