Circuit structure with vertical double gate
AssigneeNan Ya Technology Corporation
InventorsJeng Hsing Jang, Yi Nan Chen, Hsien Wen Liu
Life of this patent
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Abstract
A circuit structure including a semiconductor substrate having a depression; a first insulating layer positioned on the surface of the depression; a bottom conductor positioned in a bottom portion of the depression, wherein the bottom conductor is connected to an external bias through a plurality of longer vertical contact plugs; an upper conductor positioned in an upper portion of the depression, wherein the upper conductor is connected to a plurality of shorter vertical contact plugs, and a top surface of the upper conductor is higher than a depression-bearing surface of the semiconductor substrate; and a second insulating layer positioned between the bottom conductor and the upper conductor.
Claims13
A circuit structure, comprising:
- a semiconductor substrate having a depression;
- a first insulating layer positioned on the surface of the depression;
- a bottom conductor positioned in a bottom portion of the depression, wherein the bottom conductor is connected to an external bias through a plurality of longer vertical contact plugs;
- an upper conductor positioned in an upper portion of the depression, wherein the upper conductor is connected to a plurality of shorter vertical contact plugs, and a top surface of the upper conductor is higher than a depression-bearing surface of the semiconductor substrate;
- and
- a second insulating layer positioned between the bottom conductor and the upper conductor.
Dependencies are inferred from the claim text.