Non-conformal hardmask deposition for through silicon etch
AssigneeInternational Business Machines Corporation
InventorsTroy L. Graves-Abe, Mukta G Farooq
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Abstract
The present invention provides a method to form deep features in a stacked semiconductor structure. Deposition of a non-conformal hardmask onto a patterned topography can form a hardmask to protect all but recessed areas with minimal integration steps. The invention enables etching deep features, even through multiple BEOL layers, without multiple additional process steps.
Claims16
A method to form deep features in a substrate, the method comprising:
- forming a patterned layer having at least one opening on a top surface of said substrate whereby said opening exposes at least one region on said substrate,
- first etching to form a cavity in said at least one exposed region, said cavity with a width and a bottom surface at depth D1 below said top surface, and
- depositing a non-conformal first hardmask after said first etching, said first hardmask extending fully over said top surface, said first hardmask as deposited defining an open area over said bottom surface
- second etching according to said first hardmask to extend said cavity, and
- depositing a second hardmask layer after said second etching step, whereby said second hardmask layer has substantially no thickness over the bottom of said cavity.
A method to form deep features in a substrate, said method comprising:
- providing a substrate comprising a plurality of interconnect layers disposed on a semiconductor layer, at least two of said interconnect layers comprising conductive interconnects embedded within a layer of dielectric material,
- etching to form a cavity according to a photoresist mask disposed on a top surface of said substrate, said etching consuming less than the entire photoresist mask, and
- depositing a non-conformal first hardmask after stripping said photoresist layer, said first hardmask extending fully over said top surface, said first hardmask as deposited defining an open area over said cavity.
A method to protect an upper surface topography while forming a deep cavity in a semiconductor substrate, the method comprising:
- providing a layered structure comprising a semiconductor layer and a plurality of interconnect layers disposed on said semiconductor layer, at least two of said interconnect layers comprising metal wiring embedded within a layer of dielectric material;
- forming a cavity through a top surface of said plurality according to a patterned mask, said cavity having sidewalls and a bottom surface;
- while rotating said layered structure at least one full rotation about an axis normal to said semiconductor layer, depositing a hard mask at an angle offset from said axis such that said bottom surface is not covered by said hard mask;
- and
- extending said cavity into said semiconductor substrate by etching through said bottom surface.
Dependencies are inferred from the claim text.