Semiconductor device and method of fabricating semiconductor device
AssigneeSamsung Electronics Co., Ltd.
InventorsTea-Kwang Yu, Byung-Sup Shim, Yong-Kyu Lee, Bo-Young Seo, Yong-Tae Kim
Life of this patent
Estimating the term…
Abstract
A method of fabricating a semiconductor device includes providing a substrate having a memory block and a logic block defined therein, forming a dummy gate pattern on the memory block; forming a first region of a first conductivity type at one side of the dummy gate pattern and a second region of a second conductivity type at the other side of the dummy gate pattern, and forming a nonvolatile memory device electrically connected to the first region.
Claims20
A method of fabricating a semiconductor device, comprising:
- providing a substrate having a memory block and a logic block;
- forming a dummy gate pattern on the memory block;
- subsequently forming a first region of a first conductivity type at one side of the dummy gate pattern and a second region of a second conductivity type at the other region of the dummy gate pattern;
- forming an interlayer dielectric layer covering the dummy gate on the substrate;
- forming an opening extending through the interlayer dielectric layer and to the first region such that the opening exposes the first region;
- forming an electrically conductive contact pattern within the opening in the interlayer dielectric layer as electrically connected to the first region;
- and
- forming a nonvolatile memory device, capable of assuming different logic states, on and electrically connected to the contact pattern so as to be electrically connected to the first region via the contact pattern.
A method of fabricating a semiconductor device, comprising:
- providing a substrate having a memory block and a logic block;
- forming a dummy gate pattern on the memory block;
- subsequently forming a first region of a first conductivity type at one side of the dummy gate pattern and a second region of a second conductivity type at the other side of the dummy gate pattern;
- forming a first interlayer dielectric layer covering the dummy gate pattern, the first region and the second region;
- forming a first electrode in the first interlayer dielectric layer as electrically connected to the first region;
- forming a pattern of phase change material on and in contact with the first electrode;
- and
- forming a second electrode on the pattern of phase change material.
A method of fabricating a semiconductor device, comprising:
- forming a dummy gate pattern on a substrate, wherein the dummy gate pattern has the form of a gate electrode structure of a field effect transistor (FET) but is electrically isolated from any other electrical component in the semiconductor device;
- forming a bipolar junction transistor (BJT),
- wherein the forming of the BJT comprises, after the dummy gate pattern has been formed, forming a first region of a first conductivity type at one side of the dummy gate pattern and a second region of a second conductivity type at the other region of the dummy gate pattern;
- and
- forming a memory component, comprising phase change material, electrically connected to the first region, such that the BJT controls an operation of the memory component.
Dependencies are inferred from the claim text.