Data-driven integrated circuit architecture

An integrated circuit, comprising:

• a configurable circuit element configurable for a plurality of data operations, each data operation corresponding to a context of a plurality of contexts;
• a plurality of input queues;
• a plurality of output queues;
• at least one configuration and control register to store, for each context of the plurality of contexts, a plurality of configuration bits, a run status bit, a plurality of bits designating a data source address and a data source context, and a plurality of bits designating at least one data input queue and at least one data output queue;
• an input controller to allow input of data into the context-designated input queue when a received data source address and data source context match the context-designated data source address and data source context;
• and
• an element controller coupled to the configurable circuit element and to the at least one configuration and control register, the element controller to allow loading of a context configuration and execution of a data operation upon the arrival of input data in the context-designated data input queue when the context run status is enabled and the context-designated data output has a status to accept output data.

An integrated circuit, comprising:

• a configurable circuit element configurable for a plurality of data operations, each data operation corresponding to a context of a plurality of contexts;
• a plurality of input queues;
• a plurality of output queues;
• at least one configuration and control register to store, for each context of the plurality of contexts, a plurality of configuration bits, a run status bit, and a plurality of bits designating at least one data input queue and at least one data output queue;
• an input controller coupled to the plurality of input queues, the input controller is to issue a data deny signal to a source of the input data when the context-designated data input queue does not have a status to accept data for the selected context;
• an output controller coupled to the plurality of output queues, and when the output controller receives a data deny signal following a first data broadcast, the output controller to direct a second data broadcast and issue a data retry signal at a later time;
• and
• an element controller coupled to the configurable circuit element and to the at least one configuration and control register, the element controller to allow loading of a context configuration and execution of a data operation upon the arrival of input data in the context-designated data input queue when the context run status is enabled and the context-designated data output has a status to accept output data.

An integrated circuit, comprising:

• a configurable circuit element configurable for a plurality of data operations, each data operation corresponding to a context of a plurality of contexts;
• a plurality of input queues;
• a plurality of output queues;
• at least one configuration and control register to store, for each context of the plurality of contexts, a plurality of configuration bits, a run status bit, and a plurality of bits designating at least one data input queue and at least one data output queue;
• an element controller coupled to the configurable circuit element and to the at least one configuration and control register, the element controller to allow loading of a context configuration and partial or conditional execution of a data operation upon the arrival of input data in the context-designated data input queue when the context run status is enabled and the context-designated data output queue has a status to accept output data.