Method for decomposing a designed pattern layout
AssigneeHynix Semiconductor Inc.
InventorCheol Kyun Kim
Life of this patent
Estimating the term…
Abstract
A method for decomposing a designed pattern layout and a method for fabricating an exposure mask using the same. After the designed pattern layout is automatically decomposed to obtain a plurality of mask layouts, a problematic region is determined through simulation of the mask layout, and fed back to correct the designed pattern layout. As a result, problems can be detected in each process and corrected to reduce the process time.
Claims5
A method for decomposing a designed pattern layout for forming a photo mask pattern, the designed pattern layout including a plurality of line patterns and pad patterns overlapped with the line patterns, the method comprising:
- decomposing the designed pattern layout to form first, second, and third mask layouts, wherein:
- the first mask layout has a first pattern defined to be surrounded by two neighboring line patterns of the designed pattern layout and a connection portion connecting respective end portions of the two neighboring line patterns;
- the second mask layout has a second pattern that defines the pad patterns of the designed pattern layout, each pad pattern overlapping an end portion of one of the two neighboring line patterns;
- and
- the third mask layout has a third pattern that opens the connection portion;
- fabricating a photo mask pattern using the first, second, and third mask layouts;
- fabricating a photo mask having the photo mask pattern.
Dependencies are inferred from the claim text.