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US 8,427,819 B1Granted
Substrate interconnect routing
AssigneeAmazon Technologies, Inc.
InventorsChris T. Li, Christopher Paul Lander, Ximeng Yang, Amish Rajesh Babu, Shyeu-Yang Wang
Life of this patent
Estimating the term…
Abstract
One or more data signal interconnects arranged on a substrate of a dense array reduce overall size of a device incorporating the dense array, such as a touch sensor or display. The data signal interconnects on the substrate carry signals from printed circuits coupled to the array to a controller via interconnect tabs.
Claims28
A device comprising:
- a display having a substrate;
- a plurality of display subprocessors coupled to the display via a fan-out of drive signal lines;
- a first printed circuit configured to couple one or more of the display subprocessors to an image processing unit;
- one or more substrate data signal interconnects disposed on the substrate, each substrate data signal interconnect having a first end proximate to a first side of the substrate proximate to the first printed circuit and a second end proximate to a second side of the substrate and proximate to a second printed circuit;
- a first interconnect tab configured to couple the first printed circuit to the first end of the one or more substrate data signal interconnects;
- and
- the second printed circuit configured to couple the one or more of the display subprocessors of the first printed circuit to the image processing unit via a second interconnect tab coupling the second end of the one or more substrate data signal interconnects to the second printed circuit.
4 more elements
A device comprising:
- a display comprising a thin-film transistor matrix (TFTM) disposed on a substrate;
- a first display subprocessor coupled to at least a portion of the TFTM via a first fan-out of drive signal lines disposed on a first flexible printed circuit;
- a second display subprocessor coupled to at least a portion of the TFTM via a second fan-out of drive signal lines disposed on a second flexible printed circuit;
- and
- one or more data signal lines coupling the first display subprocessor to a display controller via the second flexible printed circuit and one or more substrate data signal interconnects disposed on the substrate.
2 more elements
A device comprising:
- an addressable array having a substrate;
- a first printed circuit configured to couple at least a portion of the addressable array to a controller;
- one or more substrate interconnects disposed on the substrate, each substrate interconnect having a first end proximate to a first side of the substrate and a second end proximate to a second side of the substrate;
- a first interconnect tab coupling the first printed circuit to the first end of the one or more substrate interconnects;
- and
- a second interconnect tab coupling a second printed circuit to the second end of the one or more substrate interconnects, wherein the second printed circuit is configured to couple at least a portion of the addressable array to the controller via the first and second interconnect tabs and the one or more substrate interconnects.
3 more elements
A method comprising:
- forming a substrate signal interconnect on an array substrate having a first end proximate to a first side of the substrate and a second end proximate to a second side of the substrate;
- connecting a data signal line of a first printed circuit to the first end of the substrate signal interconnect with a first interconnect tab;
- and
- connecting a data signal line of a second printed circuit to the second end of the substrate signal interconnect with a second interconnect tab.
1 more element
A method comprising:
- forming a substrate signal interconnect on an array substrate having a first end proximate to a first side of the substrate and a second end proximate to a second side of the substrate;
- connecting a first side of a first interconnect tab to the first end of the substrate signal interconnect;
- connecting a first side of a second interconnect tab to the second end of the substrate signal interconnect;
- connecting a first circuit board to a second side of the first interconnect tab;
- and
- connecting a second circuit board to a second side of the second interconnect tab.
3 more elements
Dependencies are inferred from the claim text.