High voltage, high frequency ESD protection circuit for RF ICs

A device including a cascode grounded gate NFET, for providing protection to an IC against negative voltage ESD pulses, comprising:

• a diode network, coupled between an IC pad of the IC and the source of the cascode grounded gate NFET, where the diode network sets the turn-on voltage of the device at a desired level;
• and
• a bias circuit, to set a desired negative voltage level at the gate of the cascode grounded gate NFET,
• where the cascode grounded gate NFET comprises at least a first NFET and a second NFET in cascode configuration, and where the bias circuit has a first terminal coupled to the source of the second NFET, a second terminal coupled to ground and a third terminal coupled to the gate of the first NFET, the third terminal providing a desired negative voltage level to the gate of the first NFET.

A device including a cascode grounded gate NFET, for providing protection to an IC against negative voltage ESD pulses, comprising:

• a diode network, coupled between an IC pad of the IC and the source of the cascode grounded gate NFET, where the diode network sets the turn-on voltage of the device at a desired level;
• and
• a bias circuit, to set a desired negative voltage level at the gate of the cascode grounded gate NFET,
• where the diode network comprises a plurality of diodes connected in series having an anode of the diode first in the series coupled to the source of the cascode grounded gate NFET and a cathode of the diode last in the series coupled to the IC pad of the IC, and
• where the diodes are N+Pwell diodes having the Deep Nwell terminal coupled to a positive supply through a resistor.

A device comprising:

• a first ESD clamp for providing protection to an IC against ESD charges caused by positive voltage ESD pulses, having a cascode grounded NFET (202), a precharge circuit and a diode network, where the diode network is coupled between an IC pad of the IC and a drain node of the cascode grounded gate NFET, and where the first ESD clamp provides an electrical path for the ESD charge to discharge from the IC pad to ground;
• and
• a second ESD clamp coupled in parallel to the first ESD clamp, for providing protection to the IC against ESD charges caused by negative voltage ESD pulses, having a cascode grounded gate NFET, a bias circuit and a diode network ,
• where the diode network is coupled between an IC pad of the IC and a source of the cascode grounded gate NFET, and where the second ESD clamp provides an electrical path for the ESD charge to discharge from ground to IC pad, and
• where the precharge circuit comprises a diode having an anode coupled to a positive supply and a cathode coupled to the drain of the cascode grounded gate NFET and to the diode network.

An IC including an IC pad coupled to an RF front-end (RFFE) switch, comprising:

• an ESD clamp having a cascode grounded gate NFET, a precharge circuit and a diode network to set the turn-on voltage of the ESD clamp at a desired level, where the diode network is coupled between the IC pad of the IC and a drain of the cascode grounded gate NFET, and where the ESD clamp provides protection to the IC against charges caused by positive voltage ESD pulses by providing an electrical path for the ESD charge to discharge from the IC pad to ground;
• and
• an ESD protection circuit coupled between ground and a series switch of the RFFE switch to provide an electrical path for the ESD charge to discharge to the IC pad from ground for protecting the IC against negative voltage ESD pulses,
• where the precharge circuit comprises a diode having an anode coupled to a positive supply and a cathode coupled to the drain of the cascode grounded gate NFET and to the diode network.

A device including an ESD clamp for providing protection to an IC against positive voltage ESD pulses, comprising:

• means, coupled between an IC pad of the IC and a node of the ESD clamp, for setting the turn on voltage of the device to a desired level, and including a cascode grounded gate NFET, a precharge circuit and a diode network;
• and
• means for setting a bias voltage at the node to a desired level in order to reduce the capacitive loading at the IC pad,
• where the precharge circuit comprises a diode having an anode coupled to a positive supply and a cathode coupled to the drain of the cascode grounded gate NFET and to the diode network.

A device including an ESD clamp having at least a first terminal and a second terminal, for providing protection to an IC against negative voltage ESD pulses, comprising:

• means, coupled between an IC pad of the IC and the first terminal of the ESD clamp, for setting the turn on voltage of the device to a desired level and including a cascode grounded gate NFET characterized by first and second NFETs in cascade configuration;
• and
• means for setting a bias voltage at the first terminal and at the second terminal of the ESD clamp to a desired level in order to provide a desired negative voltage level to the second terminal of the ESD clamp,
• where the means for setting the bias voltage includes a first terminal coupled to the source of the second NFET, a second terminal coupled to ground and a third terminal coupled to the gate of the first NFET, the third terminal providing a desired negative voltage level to the gate of the first NFET.

An IC including an IC pad coupled to an RFFE switch, comprising:

• an ESD clamp having (i) a cascode grounded gate NFET characterized by first and second NFETs in cascade configuration, (ii) means, coupled between the IC pad of the IC and a terminal of the cascode grounded gate NFET, for setting the turn on voltage of the ESD clamp to a desired level, and (iii) means for setting a bias voltage at the terminal of the cascode grounded gate NFET to a desired level in order to reduce the capacitive loading at the IC pad, where the ESD clamp provides protection to the IC against charges caused by positive voltage ESD pulses by providing an electrical path for the ESD charge to discharge from the IC pad to ground;
• and
• means, coupled between ground and a series switch of the RFFE switch, for providing an electrical path for the ESD charge to discharge to the IC pad from ground to protect the IC against negative voltage ESD pulses,
• where the means for setting the bias voltage includes a first terminal coupled to the source of the second NFET, a second terminal coupled to ground and a third terminal coupled to the gate of the first NFET, the third terminal providing a desired negative voltage level to the gate of the first NFET.