Nonvolatile memory devices including multiple charge trapping layers

A nonvolatile memory device comprising:

• a substrate;
• a gate electrode that is spaced apart from the substrate;
• and
• a charge tunneling layer, a charge blocking layer and a plurality of alternating first and second charge trapping layers, all of which are stacked between the substrate and the gate electrode, the first and second charge trapping layers having different energy band gaps therebetween that are also less than energy band gaps of both the charge tunneling layer and the charge blocking layer,
• wherein at least two of the first and/or second charge trapping layers also have different energy band gaps therebetween;
• and
• wherein the first charge trapping layers comprise silicon nitride layers and the second charge trapping layers comprise silicon oxynitride layers.

A nonvolatile memory device comprising:

• a substrate;
• a gate electrode that is spaced apart from the substrate;
• and
• a charge tunneling layer, a charge blocking layer and a plurality of alternating first and second charge trapping layers, all of which are stacked between the substrate and the gate electrode, the first and second charge trapping layers having different composition stoichiometries therebetween that are also different than that of both the charge tunneling layer and the charge blocking layer,
• wherein at least two of the first and/or second charge trapping layers also have different composition stoichiometries therebetween;
• and
• wherein the first charge trapping layers comprise silicon nitride layers and the second charge trapping layers comprise silicon oxynitride layers.