Metal programmable logic and multiple function pin interface
AssigneeMarvell International Ltd.
InventorYongjiang Wang
Life of this patent
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Abstract
Some of the embodiments of the present invention provide an integrated circuit device including a first metal interconnect, an end of which is coupled to a core of the integrated circuit device, a second metal interconnect, an end of which is coupled to a first input/output (I/O) pin, and a third metal interconnect configured to be coupled to the first metal interconnect and to the second metal interconnect. Other embodiments are also described and claimed.
Claims16
An integrated circuit device comprising:
- a plurality of input/output pins;
- a plurality of components, wherein each component of the plurality of components is not an input/output pin of the integrated circuit device;
- a first plurality of metal interconnects, wherein an end of each of the first plurality of metal interconnects is coupled to a respective component of the plurality of components, and wherein the first plurality of metal interconnects are substantially parallel to each other;
- a second plurality of metal interconnects, wherein an end of each of the second plurality of metal interconnects is coupled to a respective input/output pin of the plurality of input/output pins;
- and
- a plurality of shorting bars, wherein each of the plurality of shorting bars electrically couples (i) a corresponding metal interconnect of the first plurality of metal interconnects with (ii) a corresponding metal interconnect of the second plurality of metal interconnects.
A method for arranging metal interconnects in an integrated circuit device, wherein the integrated circuit device comprises (i) a plurality of input/output pins and (ii) a plurality of components, wherein each component of the plurality of components is not an input/output pin of the integrated circuit device, and wherein the method comprises:
- arranging a first plurality of metal interconnects in the integrated circuit device, such that an end of each of the first plurality of metal interconnects is coupled to a respective component of the plurality of components, wherein the first plurality of metal interconnects are substantially parallel to each other;
- arranging a second plurality of metal interconnects in the integrated circuit device, such that an end of each of the second plurality of metal interconnects is coupled to a respective input/output pin of the plurality of input/output pins;
- and
- arranging a plurality of shorting bars such that each of the plurality of shorting bars electrically couples (i) a corresponding metal interconnect of the first plurality of metal interconnects with (ii) a corresponding metal interconnect of the second plurality of metal interconnects.
Dependencies are inferred from the claim text.