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US 8,299,561 B2Granted
Shielding for high-voltage semiconductor-on-insulator devices
AssigneeInternational Business Machines Corporation
InventorsAlan B. Botula, Beth Ann Rainey, Yun Shi
Life of this patent
Estimating the term…
Abstract
Integrated circuits having doped bands in a substrate and beneath high-voltage semiconductor-on-insulator (SOI) devices are provided. In one embodiment, the invention provides an integrated circuit comprising: a semiconductor-on-insulator (SOI) wafer including: a substrate; a buried oxide (BOX) layer atop the substrate; and a semiconductor layer atop the BOX layer; a plurality of high voltage (HV) devices connected in series within the semiconductor layer; a doped band within the substrate and below a first of the plurality of HV devices; and a contact extending from the semiconductor layer and through the BOX layer to the doped band.
Claims24
An integrated circuit comprising:
- a semiconductor-on-insulator (SOI) wafer including:
- a p-type substrate;
- a buried oxide (BOX) layer atop the p-type substrate;
- and
- a semiconductor layer atop the BOX layer;
- a plurality of high voltage (HV) devices connected in series within the semiconductor layer;
- an n-doped band within the p-type substrate and below a first of the plurality of HV devices;
- an additional n-doped band within the p-type substrate and below a second of the plurality of HV devices;
- a contact extending from the semiconductor layer and through the BOX layer to the n-doped band;
- and
- an additional contact extending through the BOX layer to the additional n-doped band between and connected in series to the second and a third of the plurality of HV devices.
8 more elements
An integrated circuit comprising:
- a semiconductor-on-insulator (SOI) wafer including:
- a substrate;
- a buried oxide (BOX) layer atop the substrate;
- and
- a semiconductor layer atop the BOX layer;
- at least one high voltage (HV) device within the semiconductor layer;
- an n-doped band within the substrate and below the at least one HV device;
- and
- a contact extending from the semiconductor layer and through the BOX layer to the n-doped band,
- wherein a portion of the n-doped band extends laterally beyond an end of the at least one HV device.
7 more elements
An integrated circuit comprising:
- a semiconductor-on-insulator (SOI) wafer including:
- a p-type substrate;
- a buried oxide (BOX) layer atop the substrate;
- and
- a semiconductor layer atop the BOX layer;
- a first high voltage (HV) device and a second HV device connected in series within the semiconductor layer;
- a first n-doped band within the substrate and below the first HV device;
- a second n-doped band within the substrate and below the second HV device;
- a first contact extending from the semiconductor layer and through the BOX layer to the first n-doped band;
- and
- a second contact extending from the semiconductor layer and through the BOX layer to the second n-doped band,
- wherein the first n-doped band and the second n-doped band are separated within the p-type substrate by a space, a portion of the first n-doped band extends laterally beyond an end of the first HV device, and a portion of the second n-doped band extends laterally beyond an end of the second HV device.
9 more elements
An integrated circuit comprising:
- a semiconductor-on-insulator (SOI) wafer including:
- a substrate;
- a buried oxide (BOX) layer atop the substrate;
- and
- a semiconductor layer atop the BOX layer;
- a plurality of high voltage (HV) devices connected in series within the semiconductor layer;
- a doped band within the substrate and below a first of the plurality of HV devices;
- and
- a contact extending from the semiconductor layer and through the BOX layer to the doped band,
- wherein the contact is connected in series between the first and a second of the plurality of HV devices.
7 more elements
An integrated circuit comprising:
- a semiconductor-on-insulator (SOI) wafer including:
- a substrate;
- a buried oxide (BOX) layer atop the substrate;
- and
- a semiconductor layer atop the BOX layer;
- a plurality of high voltage (HV) devices connected in series within the semiconductor layer;
- a doped band within the substrate and below a first of the plurality of HV devices;
- and
- a contact extending from the semiconductor layer and through the BOX layer to the doped band,
- wherein a portion of the doped band extends laterally beyond an end of the first of the plurality of HV devices.
7 more elements
An integrated circuit comprising:
- a semiconductor-on-insulator (SOI) wafer including:
- a substrate;
- a buried oxide (BOX) layer atop the substrate;
- and
- a semiconductor layer atop the BOX layer;
- a plurality of high voltage (HV) devices connected in series within the semiconductor layer;
- a doped band within the substrate and below a first of the plurality of HV devices;
- and
- a contact extending from the semiconductor layer and through the BOX layer to the doped band,
- wherein the doped band is connected in series to the first of the plurality of HV devices and a second of the plurality of HV devices.
7 more elements
An integrated circuit comprising:
- a semiconductor-on-insulator (SOI) wafer including:
- a substrate;
- a buried oxide (BOX) layer atop the substrate;
- and
- a semiconductor layer atop the BOX layer;
- a plurality of high voltage (HV) devices connected in series within the semiconductor layer;
- a doped band within the substrate and below a first of the plurality of HV devices;
- and
- a contact extending from the semiconductor layer and through the BOX layer to the doped band,
- wherein at least one of the plurality of HV devices includes an internal isolation that does not reach the BOX layer.
7 more elements
Dependencies are inferred from the claim text.