CMOS ESD clamp with input and separate output voltage terminal for ESD protection
AssigneeNational Semiconductor Corporation
InventorVladislav Vashchenko
Life of this patent
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Abstract
In a snapback NMOS ESD protection structure, the output voltage presented to an internal circuit for ESD protection is limited by providing for a separate output terminal at a lower voltage than the input terminal. The voltage drop between the two terminals is achieved by connecting the input and output terminals to different parts of a ballast region of the structure and using the saturation resistance of the portion of the ballast region between the terminals to achieve the voltage drop.
Claims4
A method of protecting a primary circuit by means of a snapback NMOS ESD protection structure that includes a source, a gate and a drain, the drain comprising a drain input terminal and an unsilicided ballast region, the method comprising
- providing the NMOS ESD protection structure with an output terminal connected to the ballast region and separated from the drain input terminal by a potential drop across at least part of a ballast region of the structure,
- connecting the NMOS ESD protection structure between a pad and ground, and
- connecting the output terminal to an input of the primary circuit.
A method of providing a primary circuit with ESD protection by means of a snapback NMOS ESD protection structure while limiting the voltage over the primary circuit during an ESD event prior to triggering of the snapback NMOS ESD protection structure, the NMOS ESD protection structure having a drain, a source, and a gate, the drain including a silicided drain region, and an unsilicided drain ballast region extending between the silicided drain region and the gate, the method comprising
- providing a drain input terminal to the silicided drain region of the snapback NMOS structure
- providing a separate drain output terminal from the drain ballast region of the snapback NMOS structure, and
- connecting the drain output terminal to an input of the primary circuit.
Dependencies are inferred from the claim text.