Vertical thin film transistor and method for manufacturing the same and display device including the vertical thin film transistor and method for manufacturing the same
AssigneeChunghwa Picture Tubes, Ltd.
InventorsShou-cheng Weng, Huai-an Li, Chi-neng Mo
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Abstract
A vertical thin film transistor and a method for manufacturing the same and a display device including the vertical thin film transistor and a method for manufacturing the same are disclosed. The vertical thin film transistor is applied to a substrate. In the present invention, a gate layer of the vertical thin film transistor is formed to have a plurality of concentric annular structures and the adjacent concentric annular structures are linked. By the concentric annular structures of the gate electrode layer, resistance to stress and an on-state current of the vertical thin film transistor can be increased.
Claims17
A vertical thin film transistor, applied to a substrate, the vertical thin film transistor comprising:
- a first electrode layer, formed on the substrate, the first electrode layer comprising a first area and a second area, the first area comprising a plurality of concentric annular sub-areas and at least one linking sub-area, each linking sub-area being positioned to link the adjacent concentric annular sub-areas, the second area including at least one sub-area, each sub-area of the second area being positioned in a region between the adjacent concentric annular sub-areas excluding the linking sub-area of the first area, the first area further comprising a circular sub-area positioned inside the innermost one of the concentric annular sub-areas and an innermost linking sub-area positioned to link the innermost one of the concentric annular sub-areas and the circular sub-area, and the second area further including another sub-area positioned in another region between the circular sub-area and the innermost one of the concentric annular sub-areas excluding the innermost linking sub-area of the first area;
- a first insulating layer, formed on the first area of the first electrode layer;
- a gate electrode layer, formed correspondingly on the first insulating layer;
- a second insulating layer, formed correspondingly on the gate electrode layer;
- a semiconductor layer, formed on the second area of the first electrode layer;
- a third insulating layer, formed on side surfaces of the gate electrode layer;
- and
- a second electrode layer, formed on the semiconductor layer.
Dependencies are inferred from the claim text.