One-time programmable memory

A programmable memory array comprising a plurality of memory cells, at least one memory cell of the plurality of memory cells comprising:

• an isolation layer formed of a dielectric material;
• a field effect transistor comprising:
• a first semiconductor region of a first conductivity type and a second semiconductor region of the first conductivity type, wherein the first semiconductor region and the second semiconductor region are formed over the isolation layer;
• a channel region of a second conductivity type present between the first semiconductor region and the second semiconductor region;
• a gate insulator overlying the channel region;
• and
• a first conductive gate overlying the gate insulator;
• a programmable element comprising:
• the second semiconductor region of the first conductivity type;
• a third region present over the isolation layer, wherein the third region is formed of the dielectric material;
• a semiconductor body present over the isolation layer, wherein the semiconductor body is present between the second semiconductor region and the third region, and wherein the semiconductor body of the programmable element is undoped;
• an insulator layer overlying the semiconductor body;
• and
• a second conductive gate present over the insulator layer;
• a bit line in contact with the first semiconductor region;
• a select word line coupled to the first conductive gate of the field effect transistor;
• and
• a program word line coupled to the second conductive gate of the programmable element.