Semiconductor storage device

A non-volatile semiconductor storage device comprising:

• a semiconductor substrate;
• a semiconductor layer disposed on the semiconductor substrate;
• device isolation/insulation films disposed in the semiconductor layer along a first direction as its longitudinal direction;
• device formation regions configured to separate the semiconductor layer with the device isolation/insulation films along the first direction as its longitudinal direction;
• a memory string including a plurality of memory transistors connected in series and disposed on each of the device formation regions;
• a select gate transistor having one end connected to the memory string, the select gate transistor being disposed on each of the device formation regions;
• a contact diffusion region connected to the other end of the select gate transistor;
• and
• a contact contacting with the contact diffusion region,
• the device isolation/insulation films each having a first height within a first area and a second height higher than the first height within a second area,
• at least the device isolation/insulation films adjacent to the contact diffusion region existing in the second area,
• the device isolation/insulation films adjacent to the memory transistors existing in the first area,
• the device isolation/insulation films being implanted with an impurity of a first conductivity type, and
• the device formation regions each having a diffusion region of the first conductivity type.

A method of manufacturing a non-volatile semiconductor storage device, the non-volatile semiconductor storage device comprising:

• a memory string and a select gate transistor on a device formation region, a contact diffusion region in the device formation region, the memory string including a plurality of memory transistors connected in series, the select gate transistor having one end connected to one end of the memory string, and the contact diffusion region being connected to the other end of the select gate transistor and in contact with a contact, and
• the method comprising:
• forming trenches in a semiconductor layer along a first direction as its longitudinal direction, and forming device isolation/insulation films within the trenches to separate the semiconductor layer into a plurality of device formation regions with the device isolation/insulation films;
• covering at least a region where the contact diffusion region is to be formed with a mask;
• etching back the device isolation/insulation films using the mask;
• implanting an impurity into the device isolation/insulation films using the mask;
• and
• diffusing the impurity from the device isolation/insulation films toward the device formation regions through a thermal process.