Producing a vertical transistor including reentrant profile
AssigneeEastman Kodak Company
InventorsShelby F. Nelson, David H. Levy, Lee W. Tutt
Life of this patent
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Abstract
Producing a vertical transistor includes providing a substrate including a gate material layer stack with a reentrant profile. An electrically insulating material layer is deposited over a portion of the gate material layer stack and over a portion of the substrate. A patterned deposition inhibiting material is deposited over the electrically insulating material layer. A semiconductor material layer is deposited over the electrically insulating material layer using a selective area deposition process in which the semiconductor material layer is not deposited over the patterned deposition inhibiting material.
Claims5
A method of producing a vertical transistor comprising:
- providing a substrate including a gate material layer stack with a reentrant profile;
- depositing an electrically insulating material layer over a portion of the gate material layer stack and over a portion of the substrate;
- depositing a patterned deposition inhibiting material over the electrically insulating material layer;
- and
- depositing a semiconductor material layer over the electrically insulating material layer using a selective area deposition process in which the semiconductor material layer is not deposited over the patterned deposition inhibiting material.
Dependencies are inferred from the claim text.