Pattern generating method, method of manufacturing semiconductor device, and recording medium

A method of manufacturing a semiconductor device comprising:

• preparing design layout data of a semiconductor integrated circuit pattern;
• performing pattern formation simulations based on the design layout data subjected to OPC processing with a plurality of process parameters set in process conditions in a predetermined range;
• extracting a number of risk points having likelihood of causing a pattern formation failure higher than a predetermined value or a risk degree of the risk points, and calculating, as a worst condition, based on the number of the risk points or the risk degree of the risk points, a process condition having a process parameter that brings about a worst result when pattern formation is performed among the process parameters, the risk point being extracted from simulation results of the pattern formation simulations;
• changing the design layout data or the OPC processing such that when a pattern is formed under the worst condition based on the changed design layout data or the changed OPC processing a number of the risk points or a risk degree of the risk points of the pattern is smaller than the simulation result;
• and
• forming a pattern on a wafer based on the changed design layout data or the changed OPC processing.

A non-transitory computer-readable recording medium having a program that causes a computer to perform:

• preparing design layout data of a semiconductor integrated circuit pattern;
• extracting a number of risk points having likelihood of causing a pattern formation failure higher than a predetermined value or a risk degree of the risk points from a result obtained by executing pattern formation simulations on design layout data of a semiconductor integrated circuit pattern subjected to OPC processing using process conditions in which a plurality of parameters are set in a predetermined range;
• calculating, as a worst condition, based on the number of the risk points or the risk degree of the risk points, a process condition having a process parameter that brings about a worst result when pattern formation is performed among the process parameters;
• and
• changing the design layout data or the OPC processing such that when a pattern is formed under the worst condition based on the changed design layout data or the changed OPC processing a number of the risk points or a risk degree of the risk points of the pattern is smaller than the simulation result.