Nonvolatile memory devices and methods of manufacturing the same

A method of manufacturing a nonvolatile memory device, the method comprising:

• forming a tunneling layer on a substrate;
• forming a floating gate on the tunneling layer;
• forming an inter-gate dielectric layer structure by sequentially laminating a first silicon oxide layer, a high dielectric layer, and a second silicon oxide layer on the floating gate;
• and
• forming a control gate on the inter-gate dielectric layer structure;
• wherein formation of the high dielectric layer comprises forming a first high dielectric layer on the first silicon oxide layer and forming a second high dielectric layer on the first high dielectric layer, wherein the first and second high dielectric layers each comprise materials having a different density of electron trap sites and different energy band gap or a different conduction band-offset than each other.

A nonvolatile memory device comprising:

• a tunneling layer on a substrate;
• a floating gate on the tunneling layer;
• an inter-gate dielectric layer structure on the floating gate, the inter-gate dielectric layer structure comprising a first silicon oxide layer, a high dielectric layer on the first silicon oxide layer, and a second silicon oxide layer on the high dielectric layer opposite to the first silicon oxide layer;
• and
• a control gate on the inter-gate dielectric layer structure;
• wherein the high dielectric layer comprises first and second high dielectric layers laminated on each other, and the density of electron trap sites of the first high dielectric layer is not more than half of the density of electron trap sites of the second high dielectric layer, and the density of electron trap sites of the first high dielectric layer is not more than 1019/cm3;
• wherein the first high dielectric layer is directly on the first silicon oxide layer and the second silicon oxide layer is directly on the second high dielectric layer.