Mixer circuits and methods

A method comprising:

• receiving a first component of a differential signal at a gate of a first transistor, the first transistor further having a source, and a drain;
• receiving a second component of a differential signal at a gate of a second transistor, the second transistor further having a source, and a drain, wherein a first capacitance is coupled between the source of the first transistor and the source of the second transistor;
• and
• receiving a second signal in a bias circuit, the bias circuit having an input, a first output coupled to the source of the first transistor, and a second output coupled to the source of the second transistor, wherein the bias circuit receives the second signal and generates first and second current signals on the first and second outputs, and wherein the first and second transistors are mixer core transistors which receive and mix a local oscillator (LO) signal and a mixer analog input signal coupled through the bias circuit.

A circuit comprising:

• a first transistor having a gate, a source, and a drain;
• a second transistor having a gate, a source, and a drain;
• a first capacitance coupled between the source of the first transistor and the source of the second transistor;
• a first bias circuit having an input, a first output coupled to the source of the first transistor, and a second output coupled to the source of the second transistor, wherein the first bias circuit receives a first input signal and generates first and second current signals on the first and second outputs of the first bias circuit to the source of the first transistor and the source of the second transistor;
• a third transistor having a gate, a source, and a drain;
• a fourth transistor having a gate, a source, and a drain;
• a second capacitance coupled between the source of the first transistor and the source of the second transistor;
• a second bias circuit having an input, a first output coupled to the source of the third transistor, and a second output coupled to the source of the fourth transistor, wherein the second bias circuit receives a second input signal and generates third and fourth current signals on the first and second outputs of the second bias circuit to the source of the third transistor and the source of the fourth transistor;
• a first load having a terminal coupled to the source of the first transistor and the source of the third transistor;
• and
• a second load having a terminal coupled to the source of the second transistor and the source of the fourth transistor.