Method for address translation in virtual machines

A computer program product for executing a machine instruction in a central processing unit, the computer program product comprising:

• a tangible computer readable storage medium readable by a processor and storing instructions for execution by the processor for performing a method for address translation in a system running multiple levels of virtual machines containing a hierarchically organized translation lookaside buffer comprising at least two linked hierarchical sub-units, a first sub-unit comprising a lookaside buffer for some higher level address translation levels, and the second sub-unit comprising a lookaside buffer for some lower level address translation levels, and said second sub-unit being arranged to store TLB index address information of the upper level sub-unit as tag information in its lower level TLB structure, the method comprising:
• collecting intermediate address translation results on different virtual machine levels;
• and
• buffering the intermediate translation results in the translation lookaside buffer;
• wherein the intermediate address translation results are used to bypass translations steps for subsequent translation requests for a slightly different virtual address;
• a caching scheme for frequently used table fetch data is handled differently from infrequently used table fetch data;
• and
• for translation steps which cannot be bypassed, the table fetch data are cached in a high-speed cache, and infrequently used table fetch data which are often bypassed, are cached in a low-speed cache.

A computer system for executing a machine instruction in a central processing unit, said computer system comprising:

• a memory;
• and
• a processor coupled to the memory, the computer system configured to perform a method for address translation in a system running multiple levels of virtual machines containing a hierarchically organized translation lookaside buffer comprising at least two linked hierarchical sub-units, a first sub-unit comprising a lookaside buffer for some higher level address translation levels, and the second sub-unit comprising a lookaside buffer for some lower level address translation levels, and said second sub-unit being arranged to store TLB index address information of the upper level sub-unit as tag information in its lower level TLB structure,
• the method comprising:
• collecting intermediate address translation results on different virtual machine levels;
• and
• buffering the intermediate translation results in the translation lookaside buffer;
• wherein the intermediate address translation results are used to bypass translations steps for subsequent translation requests for a slightly different virtual address;
• a caching scheme for frequently used table fetch data is handled differently from infrequently used table fetch data;
• and
• for translation steps which cannot be bypassed, the table fetch data are cached in a high-speed cache, and infrequently used table fetch data which are often bypassed, are cached in a low-speed cache.