Memory devices implementing clock mirroring scheme and related memory systems and clock mirroring methods

A memory device configured to operate in first and second modes, the memory device comprising:

• a first electrode pad;
• a second electrode pad, which is located at a mirroring site of the first electrode pad;
• a third electrode pad configured to be fixed to a power supply voltage or a ground voltage according to the first and second modes;
• a clock signal line configured to transmit a clock to an integrated circuit inside the memory device, wherein the clock signal line delivers a data transmitting clock of the memory device;
• a first switching unit that switches to electrically connect the first electrode pad and the clock signal line in response to a control signal during the first mode;
• and
• a second switching unit that switches to electrically connect the second electrode pad and the clock signal line in response to the control signal during the second mode,
• wherein the control signal is connected to the third electrode pad.