Proximity-based memory allocation in a distributed memory system

A method, comprising:

• a processor node broadcasting a packet comprising a memory request to a first subset of a plurality of memory nodes, wherein said plurality of memory nodes and said processor node are interconnected via a communication network according to a network topology, and wherein each memory node of said first subset of memory nodes is removed from said processor node by no more than a given number of network hops according to said network topology;
• and
• in response to determining that none of the memory nodes of said first subset of memory nodes has sent a reply to said processor node indicating that it can satisfy said memory request, said processor node:
• increasing said given number of network hops;
• and
• broadcasting a packet comprising said memory request to a second subset of said plurality of memory nodes, wherein each memory node of said second subset of memory nodes is removed from said processor node by no more than said increased given number of network hops.

A processor node, comprising:

• a processor;
• an input/output interface through which said processor communicates with a communication network, wherein said communication network is configured to interconnect a plurality of memory nodes according to a network topology;
• and
• execution logic configured to broadcast a packet comprising a memory request to a first subset of said plurality of memory nodes, wherein each memory node of said first subset of memory nodes is removed from said processor node by no more than a given number of network hops, and wherein the execution logic comprises one or more electronic circuits;
• and
• wherein, in response to timing out rather than receiving a reply from a memory node of said first subset of memory nodes indicating that it can satisfy said memory request, said execution logic is further configured to:
• increase said given number of network hops;
• and
• broadcast a packet comprising said memory request to a second subset of said plurality of memory nodes, wherein each memory node of said second subset of memory nodes is removed from said processor node by no more than said increased given number of network hops.