Differential sense amplifier
AssigneeRenesas Electronics Corporation
InventorHiroyuki Kobatake
Life of this patent
Estimating the term…
Abstract
The differential sense amplifier according to one aspect of the present invention includes a first differential amplification unit that detects a difference between the pair of complementary signals inputted from a first bit line and a second bit line, a second differential amplification unit that detects a difference between one of the complementary signals inputted from the first bit line and a first reference signal, and a third differential amplification unit that detects a difference between the other complementary signal inputted from the second bit line and a second reference signal.
Claims9
A differential sense amplifier comprising:
- a first differential amplification unit that detects a difference between a pair of complementary signals inputted from a first bit line and a second bit line;
- a second differential amplification unit that detects a difference between one of the complementary signals inputted from the first bit line and a first reference signal;
- and
- a third differential amplification unit that detects a difference between the other complementary signal inputted from the second bit line and a second reference signal.
A differential sense amplifier comprising:
- a first current mirror circuit connected to a first bit line that transmits one of complementary signals;
- a second current mirror circuit connected to a second bit line that transmits the other complementary signal;
- a first-conductivity-type first transistor in which a source thereof is connected to a drain of a second-conductivity-type transistor making up the first current mirror circuit;
- a first-conductivity-type second transistor in which a source thereof is connected to a drain of a second-conductivity-type transistor making up the second current mirror circuit;
- a first-conductivity-type third transistor in which a first reference signal is inputted to a source and a gate thereof;
- a first-conductivity-type fourth transistor in which a second reference signal is inputted to a source and a gate thereof;
- and
- a switch circuit that switches between a state where the first transistor and the second transistor make up a current mirror, and a state where the first transistor and the third transistor make up a current mirror and at the same time, the second transistor and the fourth transistor make up a current mirror.
Dependencies are inferred from the claim text.