Operating method of non-volatile memory device

A memory device, comprising:

• a substrate, having source/drain regions being separated by a channel region;
• a gate, disposed over the substrate;
• means, disposed on the substrate, for insulating the charge trapping layer from the substrate to limiting electron and hole tunneling;
• a charge storage layer disposed between the insulating means and the gate in which charge trapped in the charge storage layer is determinative of a threshold voltage for the memory device;
• and
• means, disposed between the charge storage layer and the gate, for allowing FN hole tunneling from the gate to the charge storage layer under positive bias for decreasing the threshold voltage in one of a program and an erase operation, for allowing FN electron tunneling from the gate to the charge storage layer under negative bias for the increasing the threshold voltage in another of a program and erase operation, and for preventing direct tunneling charge loss from the charge storage layer under bias levels occurring between said program and erase operations.