Nonvolatile semiconductor memory device

A nonvolatile semiconductor memory device comprising:

• a memory cell array including plural first and second wirings intersecting one another, and memory cells each provided at individual intersection between the first wiring and the second wiring, the memory cell comprising a variable resistive element configured to store, as data, one of three or greater resistance values in a nonvolatile manner, and predetermined numbers of the memory cells sharing the same first wiring to configure a page;
• an input buffer configured to store an address and data both input externally;
• a first control circuit configured to select the first wiring connected to the memory cells configuring a page of the memory cell array subjected to data-writing based on an address input via the input buffer, and to supply a constant voltage to the selected first wiring;
• a pulse generator configured to simultaneously generate plural kinds of writing pulses, each of the writing pulses being one of three kinds or more of writing voltages corresponding to data specifying three or more values, to be supplied to the plurality of respective second wirings connected to the memory cells configuring a page subjected to data-writing based on data input via the input buffer;
• and
• a second control circuit configured to select the plurality of second wirings connected to the memory cells configuring the page of the memory cell subjected to data-writing based on the address input via the input buffer, and to supply the plural kinds of writing pulses generated by the pulse generator to the respective plural selected second wirings.

A nonvolatile semiconductor memory device comprising:

• a memory cell array including plural first and second wiring intersecting one another, and memory cells each provided at individual intersection between the first wiring and the second wiring, the memory cell comprising a variable resistive element;
• a writing-voltage generating circuit configured to generate and output plural kinds of writing voltages for programming a resistance of the variable resistive element to one of three or more values based on write-in data specifying three or more values;
• and
• a writing circuit configured to write pieces of data in the respective memory cells using the respective writing voltages output from the writing-voltage generating circuit, and
• the writing circuit configured to select the plural memory cells commonly connected to the same first wiring among the plurality of memory cells, and to supply the writing voltages on the basis of pieces of data to be written in the plural respective selected memory cells to the respective second wirings connected to the individual memory cells.