CMOS image sensor with shared sensing node
AssigneeIntellectual Ventures II LLC
InventorOh-Bong Kwon
Life of this patent
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Abstract
A CMOS image sensor has a pixel array provided with a plurality of unit pixels arranged in a matrix shape of rows and columns. Each of the unit pixel includes a photocharge generation means for generating photocharges by absorbing an external light; and a sensing node for receiving the photocharges transferred from the photocharge generation means, wherein the sensing node of the unit pixel in a previous scan line is shared with a sensing node of a unit pixel in a current scan line in response to a line select signal of the current line.
Claims16
A complementary metal-oxide semiconductor (CMOS) image sensor comprising:
- a pixel array including a plurality of unit pixels arranged in a matrix shape of rows and columns, each unit pixel comprising:
- a photodiode configured to generate photocharges by absorbing an external light;
- and
- a sensing node configured to receive the photocharges transferred from the photodiode;
- wherein a sensing node of a unit pixel in a previous scan line is selectively shared with a sensing node of a unit pixel in a current scan line in response to a line select signal of the current scan line.
A complementary metal-oxide sensor (CMOS) image sensor comprising:
- a pixel array in which a plurality of unit pixels are arranged in a matrix shape of rows and columns;
- and
- a switching device configured to interconnect a sensing node of a selected unit pixel to a sensing node of a neighboring unit pixel in response to a select signal;
- wherein each unit pixel includes:
- a photodiode configured to generate photocharges by absorbing an external light;
- a sensing node configured to receive the photocharges transferred from the photodiode;
- a transfer transistor configured to transfer the photocharges from the photodiode to the sensing node;
- a reset transistor configured to reset the sensing node;
- an output unit configured to output an electric signal in response to the sensing node;
- and
- a select transistor having one side connected to the output unit, wherein the select transistor is configured to switch and address in response to the select signal.
Dependencies are inferred from the claim text.