Operational amplifier
AssigneeRenesas Electronics Corporation
InventorMasaki Shibuya
Life of this patent
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Abstract
An operational amplifier includes a differential amplifier input stage that supplies an operating current to a differential pair, the differential amplifier input stage including a first transistor having a first polarity, a push-pull amplifier output stage that includes a second transistor having the first polarity, and a third transistor having a second polarity, the second transistor and the third transistor being connected in series, and a capacitive element that connects a gate of the first transistor and a gate of the second transistor.
Claims3
An operational amplifier comprising:
- a differential amplifier input stage that supplies an operating current to a differential pair, the differential amplifier input stage comprising a first transistor having a first polarity;
- a push-pull amplifier output stage that comprises:
- a second transistor having the first polarity;
- and
- a third transistor having a second polarity, the second transistor and the third transistor being connected in series;
- a capacitive element that connects the gate of the first transistor and a gate of the second transistor,
- wherein the differential pair is formed by P channel MOS transistors,
- wherein the first transistor and the second transistor are formed by P channel MOS transistors,
- wherein the third transistor is formed by an N channel MOS transistor ,and
- wherein a negative potential is supplied from the gate of the second transistor to the gate of the first transistor when an output signal from the differential amplifier input stage is raised.
An operational amplifier comprising:
- a differential amplifier input stage that supplies an operating current to a differential pair, the differential amplifier input stage comprising a first transistor having a first polarity;
- a push-pull amplifier output stage that comprises:
- a second transistor having the first polarity;
- and
- a third transistor having a second polarity, the second transistor and the third transistor being connected in series;
- a capacitive element that connects the gate of the first transistor and a gate of the second transistor,
- wherein the differential pair is formed by N channel MOS transistors,
- wherein the first transistor and the second transistor are formed by N channel MOS transistors,
- wherein the third transistor is formed by a P channel MOS transistor, and
- wherein a positive potential is supplied from the gate of the second transistor to the gate of the first transistor when an output signal from the differential amplifier input stage is fallen.
Dependencies are inferred from the claim text.