Power factor correction circuit and method of driving the same

Abstract

The present invention relates to a power factor correction circuit and a method of driving the power factor correction circuit. The power factor correction circuit according to the present invention includes a power transfer element configured to receive an input voltage, an input current corresponding to the input voltage flowing through the power transfer element, and a switch connected to the power transfer element and configured to control an output voltage generated by the current flowing through the power transfer element. The power factor correction circuit is configured to detect a zero voltage edge timing of the input voltage by detecting the input voltage, generate a reference clock signal having a frequency that varies according to the detected edge timing, generate a reference signal using the reference clock signal, generate an error amplification signal based on a difference between the output voltage and a predetermined error reference signal, generate the amplification reference signal by multiplying the reference signal by the error amplification signal, and control a switching operation of the switch using the amplification reference signal and a detection signal corresponding to a current flowing through the switch.

Dependencies are inferred from the claim text.