Three-dimensional semiconductor devices

A three-dimensional semiconductor memory device comprising:

• a plurality of word line structures including a plurality of spaced apart word lines on a substrate;
• a plurality of active semiconductor patterns that are arranged between the plurality of word line structures and that include a plurality of electrode regions and a plurality of channel regions;
• a plurality of information storage elements between the plurality of word line structures and the plurality of active semiconductor patterns;
• a plurality of bit lines connecting respective ones of the electrode regions and crossing above or below the plurality of word line structures;
• and
• a plurality of switching elements disposed between ones of the plurality of electrode regions and ones of the plurality of bit lines to control an electrical connection between ones of the plurality of electrode regions and ones of the plurality of bit lines.