Double anneal with improved reliability for dual contact etch stop liner scheme

A method of fabricating a device comprising:

• providing a substrate prepared with a device region;
• annealing the substrate with a first anneal at a first temperature T1;
• forming a device layer over the device region, wherein the device layer comprises a first stress for applying stress on the substrate;
• and
• annealing the substrate with a second anneal at a second temperature T2 after forming the device layer, wherein T2 is less than T1 and is below a threshold temperature which causes relaxation of the first stress in the device layer to avoid or reduce relaxation of the stress applied on the substrate.

A method of fabricating a device comprising:

• providing a substrate prepared with a device region;
• annealing the substrate with a first anneal at a first temperature T1;
• forming a device layer over the device region, wherein the device layer comprises a first stress for applying stress on the substrate;
• and
• annealing the substrate with a second anneal at a second temperature T2 after forming the device layer, wherein T2 is less than T1 and is below a threshold temperature which causes relaxation of the first stress in the device layer to avoid or reduce relaxation of the stress applied on the substrate,
• wherein prior to the first anneal, forming a second device layer over the substrate covering the device region and device feature;
• and
• patterning the second device layer, wherein patterning the second device layer removes the second device layer from the device region.

A method of fabricating a device comprising:

• providing a substrate prepared with a device region having a transistor;
• annealing the substrate with a first anneal at a first temperature T1;
• forming a device layer over the device region covering the transistor after the first anneal, wherein the device layer comprises a first stress for applying stress on the substrate;
• forming a dielectric layer over the device region and the device layer;
• forming a contact in the dielectric layer to access at least one contact region of the transistor;
• and
• annealing the substrate with a second anneal at a second temperature T2, wherein T2 is less than T1 and is below a threshold temperature which causes relaxation of the first stress in the device layer to avoid or reduce relaxation of the stress applied on the substrate.

A method of fabricating a device comprising:

• providing a substrate prepared with a device region having a transistor;
• annealing the substrate with a first anneal;
• forming a device layer over the device region covering the transistor, wherein the device layer comprises a first stress for applying stress on the substrate;
• forming a dielectric layer over the device region and the device layer;
• forming a contact in the dielectric layer to access at least one contact region of the transistor;
• and
• annealing the substrate with a second anneal at a temperature T2 after forming the device layer, wherein T2 is below a threshold temperature which causes relaxation of the first stress in the device layer to avoid or reduce relaxation of the stress applied on the substrate.