Methods of manufacturing semiconductor devices
AssigneeSamsung Electronics Co., Ltd.
InventorMoon-Sook Lee
Life of this patent
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Abstract
A plurality of nanowires is grown on a first substrate in a first direction perpendicular to the first substrate. An insulation layer covering the nanowires is formed on the first substrate to define a nanowire block including the nanowires and the insulation layer. The nanowire block is moved so that each of the nanowires is arranged in a second direction parallel to the first substrate. The insulation layer is partially removed to partially expose the nanowires. A gate line covering the exposed nanowires is formed. Impurities are implanted into portions of the nanowires adjacent to the gate line.
Claims17
A method of manufacturing a semiconductor device, the method comprising:
- growing a plurality of nanowires on a first substrate in a first direction perpendicular to the first substrate;
- forming an insulation layer covering the nanowires on the first substrate to define a nanowire block including the nanowires and the insulation layer;
- moving the nanowire block so that each of the nanowires is arranged in a second direction parallel to the first substrate;
- partially removing the insulation layer to partially expose the nanowires;
- forming a gate line covering the exposed nanowires;
- implanting impurities into portions of the nanowires adjacent to the gate line;
- and
- forming a common source line (CSL), a bit line plug and a bit line, the CSL and the bit line plug making contact with the nanowires, and the bit line making contact with the bit line plug,
- wherein each nanowire, a plurality of gate lines corresponding to each nanowire, the CSL, the bit line plug and the bit line define a string, and
- wherein each nanowire has a length corresponding to integer times of a length of the string.
A method of manufacturing a semiconductor device, the method comprising:
- growing a plurality of nanowires on a first substrate in a first direction perpendicular to the first substrate;
- forming an insulation layer covering the nanowires on the first substrate to define a nanowire block including the nanowires and the insulation layer;
- moving the nanowire block so that each of the nanowires is arranged in a second direction parallel to the first substrate;
- partially removing the insulation layer to partially expose an outer surface of the nanowires, wherein partially removing the insulation layer comprises forming an opening in the nanowire block, the opening having a second width in a direction perpendicular to the second direction;
- forming a gate line covering the exposed nanowires;
- implanting impurities into portions of the nanowires adjacent to the gate line;
- and
- forming a common source line (CSL), a bit line plug and a bit line, the CSL and the bit line plug making contact with the nanowires, and the bit line making contact with the bit line plug,
- wherein each nanowire, a plurality of gate lines corresponding to each nanowire, the CSL, the bit line plug and the bit line define a string,
- and wherein each nanowire has a length corresponding to integer times of a length of the string.
Dependencies are inferred from the claim text.