Method for assembling a wafer level test probe card

A method for assembling a probe card for conducting wafer level testing of semiconductor devices, the method comprising:

• providing a silicon membrane including a plurality of test probes and active test control circuitry embedded therein operable to conduct wafer level high frequency testing;
• temporarily supporting a first surface of the silicon membrane with a glass wafer;
• applying a compressible underfill on a second surface of the silicon membrane opposite the first surface;
• aligning the silicon membrane with a circuit board including testing circuitry;
• pressing the silicon membrane and second surface with underfill thereon against the circuit board;
• curing the underfill;
• and
• removing the glass wafer from the silicon membrane.

A method for assembling a probe card for conducting wafer level testing of semiconductor devices, the method comprising:

• providing a silicon membrane including a plurality of test probes each having a tip protruding therefrom;
• temporarily supporting a first surface of the silicon membrane with a glass wafer;
• forming a ball grid array on a second surface of the silicon membrane opposite the first surface;
• applying a compressible underfill on a second surface of the silicon membrane opposite the first surface;
• aligning the silicon membrane with a circuit board including testing circuitry;
• pressing the silicon membrane and second surface with underfill thereon against the circuit board;
• curing the underfill;
• and
• removing the glass wafer from the silicon membrane.