Circuit for and method of determining a process corner for a CMOS device

A circuit for determining a process corner characterizing a CMOS device of an integrated circuit, the circuit comprising:

• a CMOS monitoring circuit comprising an NMOS transistor and a PMOS transistor of the integrated circuit coupled in series, wherein an NMOS monitor voltage is generated at a node of the NMOS transistor and a PMOS monitor voltage is generated at a node of the PMOS transistor;
• reference circuit comprising a series of resistors for generating a reference voltage for an NMOS transistor and a reference voltage for a PMOS transistor;
• a first comparator coupled to the CMOS monitoring circuit and the reference circuit, the first comparator comparing the NMOS monitor voltage generated at the node of the NMOS transistor and the reference voltage for the NMOS transistor;
• and
• a second comparator coupled to the CMOS monitoring circuit and the reference circuit, the second comparator comparing the PMOS monitor voltage generated at the node of the PMOS transistor and the reference voltage for the PMOS transistor;
• wherein the process corner characterizing the CMOS device comprises a value based upon an output of the first comparator and an output of the second comparator.

A method of determining a process corner characterizing a CMOS device of an integrated circuit, the method comprising:

• monitoring an output of an NMOS transistor and an output of a PMOS transistor of the CMOS device;
• generating a reference voltage for NMOS transistors and a reference voltage for PMOS transistors of the integrated circuit;
• comparing a voltage generated by the NMOS transistor to the reference voltage for NMOS transistors of the integrated circuit;
• comparing a voltage generated by the PMOS transistor to the reference voltage for PMOS transistors of the integrated circuit;
• and
• generating the process corner characterizing the CMOS device;
• wherein the process corner characterizing the CMOS device comprises a value based upon the comparison of the voltage generated by the NMOS transistor to the reference voltage for NMOS transistors and the comparison of the voltage generated by the PMOS transistor to the reference voltage for PMOS transistors.