Method and system for creating self-aligned twin wells with co-planar surfaces in a semiconductor device

A semiconductor device comprising:

• a first region located in a first portion of a substrate of the semiconductor device, the first region having a first type of dopant;
• at least one interference layer residing on the substrate of the semiconductor device, the at least one interference layer having a thickness configured to cause light reflected from a bottom of the at least one interference layer bordering the substrate to have a wavelength shift of half a wavelength compared to light reflected from a top of the at least one interference layer;
• and
• a photoresist layer residing above the at least one interference layer.

A semiconductor device comprising:

• a substrate;
• a first region having a first type of dopant located in the substrate, the first region having a top surface;
• a second region having a second type of dopant located in the substrate, the second region having a top surface, wherein the top surface of the first region and the top surface of the second region form a continuous co-planar surface;
• and
• at least one interference layer residing on the substrate of the semiconductor device, the at least one interference layer having a thickness configured to cause light reflected from a bottom of the at least one interference layer bordering the substrate to have a one hundred and eighty degree phase shift compared to light reflected from a top of the at least one interference layer.